JPS5965445A - 半導体素子分離領域の形成方法 - Google Patents

半導体素子分離領域の形成方法

Info

Publication number
JPS5965445A
JPS5965445A JP57175071A JP17507182A JPS5965445A JP S5965445 A JPS5965445 A JP S5965445A JP 57175071 A JP57175071 A JP 57175071A JP 17507182 A JP17507182 A JP 17507182A JP S5965445 A JPS5965445 A JP S5965445A
Authority
JP
Japan
Prior art keywords
isolation region
oxide film
element isolation
film
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57175071A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0516173B2 (2
Inventor
Hideaki Takahashi
秀明 高橋
Ginjiro Kanbara
神原　銀次郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp, Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electronics Corp
Priority to JP57175071A priority Critical patent/JPS5965445A/ja
Publication of JPS5965445A publication Critical patent/JPS5965445A/ja
Publication of JPH0516173B2 publication Critical patent/JPH0516173B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0125—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics
    • H10W10/0126—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics introducing electrical active impurities in local oxidation regions to create channel stoppers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
JP57175071A 1982-10-05 1982-10-05 半導体素子分離領域の形成方法 Granted JPS5965445A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57175071A JPS5965445A (ja) 1982-10-05 1982-10-05 半導体素子分離領域の形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57175071A JPS5965445A (ja) 1982-10-05 1982-10-05 半導体素子分離領域の形成方法

Publications (2)

Publication Number Publication Date
JPS5965445A true JPS5965445A (ja) 1984-04-13
JPH0516173B2 JPH0516173B2 (2) 1993-03-03

Family

ID=15989717

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57175071A Granted JPS5965445A (ja) 1982-10-05 1982-10-05 半導体素子分離領域の形成方法

Country Status (1)

Country Link
JP (1) JPS5965445A (2)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60257538A (ja) * 1984-05-29 1985-12-19 エヌ・ベー・フイリツプス・フルーイランペンフアブリケン 埋込酸化物層が局所的に設けられたシリコン体を有する半導体装置の製造方法
JPH01315141A (ja) * 1988-06-15 1989-12-20 Toshiba Corp 半導体装置の製造方法
US5260229A (en) * 1991-08-30 1993-11-09 Sgs-Thomson Microelectronics, Inc. Method of forming isolated regions of oxide
US5348910A (en) * 1991-12-24 1994-09-20 Seiko Epson Corporation Method of manufacturing a semiconductor device and the product thereby
JPH09181069A (ja) * 1995-11-03 1997-07-11 Hyundai Electron Ind Co Ltd 半導体装置の素子分離方法
US5834360A (en) * 1996-07-31 1998-11-10 Stmicroelectronics, Inc. Method of forming an improved planar isolation structure in an integrated circuit
US5972776A (en) * 1995-12-22 1999-10-26 Stmicroelectronics, Inc. Method of forming a planar isolation structure in an integrated circuit
US5977607A (en) * 1994-09-12 1999-11-02 Stmicroelectronics, Inc. Method of forming isolated regions of oxide
US7235460B2 (en) 1993-07-30 2007-06-26 Stmicroelectronics, Inc. Method of forming active and isolation areas with split active patterning

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5779650A (en) * 1980-09-15 1982-05-18 Gen Electric Method of producing integrated circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5779650A (en) * 1980-09-15 1982-05-18 Gen Electric Method of producing integrated circuit

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60257538A (ja) * 1984-05-29 1985-12-19 エヌ・ベー・フイリツプス・フルーイランペンフアブリケン 埋込酸化物層が局所的に設けられたシリコン体を有する半導体装置の製造方法
JPH01315141A (ja) * 1988-06-15 1989-12-20 Toshiba Corp 半導体装置の製造方法
US5260229A (en) * 1991-08-30 1993-11-09 Sgs-Thomson Microelectronics, Inc. Method of forming isolated regions of oxide
US5348910A (en) * 1991-12-24 1994-09-20 Seiko Epson Corporation Method of manufacturing a semiconductor device and the product thereby
US7235460B2 (en) 1993-07-30 2007-06-26 Stmicroelectronics, Inc. Method of forming active and isolation areas with split active patterning
US5977607A (en) * 1994-09-12 1999-11-02 Stmicroelectronics, Inc. Method of forming isolated regions of oxide
JPH09181069A (ja) * 1995-11-03 1997-07-11 Hyundai Electron Ind Co Ltd 半導体装置の素子分離方法
US5972776A (en) * 1995-12-22 1999-10-26 Stmicroelectronics, Inc. Method of forming a planar isolation structure in an integrated circuit
US5834360A (en) * 1996-07-31 1998-11-10 Stmicroelectronics, Inc. Method of forming an improved planar isolation structure in an integrated circuit
US6046483A (en) * 1996-07-31 2000-04-04 Stmicroelectronics, Inc. Planar isolation structure in an integrated circuit

Also Published As

Publication number Publication date
JPH0516173B2 (2) 1993-03-03

Similar Documents

Publication Publication Date Title
JP2521611B2 (ja) ツインウェルを有するｃｍｏｓの製造方法
JPS5965445A (ja) 半導体素子分離領域の形成方法
JPH035058B2 (2)
JPS6242382B2 (2)
JP2859332B2 (ja) 半導体装置の製造方法
JP3191694B2 (ja) 半導体記憶装置の製造方法
JPH03101250A (ja) 半導体装置の製造方法
JPH0316150A (ja) 半導体素子の製造方法
JPS63202055A (ja) 半導体装置の製造方法
JPS61112344A (ja) 半導体素子分離領域の形成方法
JPH0846026A (ja) 素子分離領域を有する半導体装置の製造方法
JPH0628281B2 (ja) 半導体装置の製造方法
JPS61198662A (ja) 半導体装置の製造方法
JPS59205750A (ja) 半導体装置の製造方法
JPH0274042A (ja) Ｍｉｓ型トランジスタの製造方法
JPS58158968A (ja) 半導体装置の製造法
JPS596559A (ja) 偏平チューブとコルゲートフィンの組付方法
JPS61224414A (ja) 半導体装置の製造方法
JPH0117256B2 (2)
JPS58149A (ja) 半導体装置
JPS61148832A (ja) 半導体装置の製造方法
JPS5929437A (ja) 半導体装置の製造方法
JPS6194356A (ja) 半導体装置の製造方法
JPS59204279A (ja) Ｍｉｓ形半導体集積回路の製造方法
JPH03211836A (ja) 半導体装置の製造方法