JPS594130A - マスタ−パタ−ンの採取方式 - Google Patents

マスタ−パタ−ンの採取方式

Info

Publication number
JPS594130A
JPS594130A JP57113168A JP11316882A JPS594130A JP S594130 A JPS594130 A JP S594130A JP 57113168 A JP57113168 A JP 57113168A JP 11316882 A JP11316882 A JP 11316882A JP S594130 A JPS594130 A JP S594130A
Authority
JP
Japan
Prior art keywords
pattern
master
matching
sample
master pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57113168A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0141027B2 (cs
Inventor
Tetsuo Hizuka
哲男 肥塚
Masahito Nakajima
雅人 中島
Hiroyuki Tsukahara
博之 塚原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57113168A priority Critical patent/JPS594130A/ja
Publication of JPS594130A publication Critical patent/JPS594130A/ja
Publication of JPH0141027B2 publication Critical patent/JPH0141027B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/601—Marks applied to devices, e.g. for alignment or identification for use after dicing
    • H10W46/603—Formed on wafers or substrates before dicing and remaining on chips after dicing

Landscapes

  • Wire Bonding (AREA)
  • Image Analysis (AREA)
JP57113168A 1982-06-30 1982-06-30 マスタ−パタ−ンの採取方式 Granted JPS594130A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57113168A JPS594130A (ja) 1982-06-30 1982-06-30 マスタ−パタ−ンの採取方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57113168A JPS594130A (ja) 1982-06-30 1982-06-30 マスタ−パタ−ンの採取方式

Publications (2)

Publication Number Publication Date
JPS594130A true JPS594130A (ja) 1984-01-10
JPH0141027B2 JPH0141027B2 (cs) 1989-09-01

Family

ID=14605272

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57113168A Granted JPS594130A (ja) 1982-06-30 1982-06-30 マスタ−パタ−ンの採取方式

Country Status (1)

Country Link
JP (1) JPS594130A (cs)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6174082A (ja) * 1984-09-19 1986-04-16 Hitachi Ltd パタ−ンマツチング用標準パタ−ンの作成方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6174082A (ja) * 1984-09-19 1986-04-16 Hitachi Ltd パタ−ンマツチング用標準パタ−ンの作成方法

Also Published As

Publication number Publication date
JPH0141027B2 (cs) 1989-09-01

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