JPS5952860A - 半導体集積回路装置 - Google Patents

半導体集積回路装置

Info

Publication number
JPS5952860A
JPS5952860A JP57165513A JP16551382A JPS5952860A JP S5952860 A JPS5952860 A JP S5952860A JP 57165513 A JP57165513 A JP 57165513A JP 16551382 A JP16551382 A JP 16551382A JP S5952860 A JPS5952860 A JP S5952860A
Authority
JP
Japan
Prior art keywords
electrode
voltage
integrated circuit
currents
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57165513A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0245339B2 (da
Inventor
Sadahiro Hayamizu
速水　貞博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP57165513A priority Critical patent/JPS5952860A/ja
Publication of JPS5952860A publication Critical patent/JPS5952860A/ja
Publication of JPH0245339B2 publication Critical patent/JPH0245339B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/316—Testing of analog circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP57165513A 1982-09-20 1982-09-20 半導体集積回路装置 Granted JPS5952860A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57165513A JPS5952860A (ja) 1982-09-20 1982-09-20 半導体集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57165513A JPS5952860A (ja) 1982-09-20 1982-09-20 半導体集積回路装置

Publications (2)

Publication Number Publication Date
JPS5952860A true JPS5952860A (ja) 1984-03-27
JPH0245339B2 JPH0245339B2 (da) 1990-10-09

Family

ID=15813819

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57165513A Granted JPS5952860A (ja) 1982-09-20 1982-09-20 半導体集積回路装置

Country Status (1)

Country Link
JP (1) JPS5952860A (da)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6331131A (ja) * 1986-07-25 1988-02-09 Toshiba Corp 半導体ウエハ
JPS6379643U (da) * 1986-11-11 1988-05-26
US5214657A (en) * 1990-09-21 1993-05-25 Micron Technology, Inc. Method for fabricating wafer-scale integration wafers and method for utilizing defective wafer-scale integration wafers
US5285082A (en) * 1989-11-08 1994-02-08 U.S. Philips Corporation Integrated test circuits having pads provided along scribe lines
JPH06244252A (ja) * 1993-02-17 1994-09-02 Nec Corp 集積回路及びその製造方法
DE19645568A1 (de) * 1996-03-18 1997-09-25 Mitsubishi Electric Corp Halbleiterscheibe, Halbleiterbauelement und Herstellungsverfahren für das Halbleiterbauelement
US5923047A (en) * 1997-04-21 1999-07-13 Lsi Logic Corporation Semiconductor die having sacrificial bond pads for die test
US6228684B1 (en) 1998-12-28 2001-05-08 Fujitsu Limited Wafer-level package, a method of manufacturing thereof and a method of manufacturing semiconductor devices from such a wafer-level package

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6331131A (ja) * 1986-07-25 1988-02-09 Toshiba Corp 半導体ウエハ
JPS6379643U (da) * 1986-11-11 1988-05-26
US5285082A (en) * 1989-11-08 1994-02-08 U.S. Philips Corporation Integrated test circuits having pads provided along scribe lines
US5214657A (en) * 1990-09-21 1993-05-25 Micron Technology, Inc. Method for fabricating wafer-scale integration wafers and method for utilizing defective wafer-scale integration wafers
JPH06244252A (ja) * 1993-02-17 1994-09-02 Nec Corp 集積回路及びその製造方法
DE19645568B4 (de) * 1996-03-18 2005-03-03 Mitsubishi Denki K.K. Herstellungsverfahren für ein Halbleiterbauelement
DE19645568A1 (de) * 1996-03-18 1997-09-25 Mitsubishi Electric Corp Halbleiterscheibe, Halbleiterbauelement und Herstellungsverfahren für das Halbleiterbauelement
US5982042A (en) * 1996-03-18 1999-11-09 Mitsubishi Denki Kabushiki Kaisha Semiconductor wafer including semiconductor device
CN1095197C (zh) * 1996-03-18 2002-11-27 三菱电机株式会社 半导体晶片
US5923047A (en) * 1997-04-21 1999-07-13 Lsi Logic Corporation Semiconductor die having sacrificial bond pads for die test
US6228684B1 (en) 1998-12-28 2001-05-08 Fujitsu Limited Wafer-level package, a method of manufacturing thereof and a method of manufacturing semiconductor devices from such a wafer-level package
US6762431B2 (en) 1998-12-28 2004-07-13 Fujitsu Limited Wafer-level package with test terminals
US7071487B2 (en) 1998-12-28 2006-07-04 Fujitsu Limited Wafer-level package having test terminal
CN100372109C (zh) * 1998-12-28 2008-02-27 富士通株式会社 晶片级封装及其制造方法以及由其制造半导体器件的方法
US7399990B2 (en) 1998-12-28 2008-07-15 Fujitsu Limited Wafer-level package having test terminal
US7642551B2 (en) 1998-12-28 2010-01-05 Fujitsu Microelectronics Limited Wafer-level package having test terminal

Also Published As

Publication number Publication date
JPH0245339B2 (da) 1990-10-09

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