JPS6236535U - - Google Patents
Info
- Publication number
- JPS6236535U JPS6236535U JP1985127619U JP12761985U JPS6236535U JP S6236535 U JPS6236535 U JP S6236535U JP 1985127619 U JP1985127619 U JP 1985127619U JP 12761985 U JP12761985 U JP 12761985U JP S6236535 U JPS6236535 U JP S6236535U
- Authority
- JP
- Japan
- Prior art keywords
- extraction electrode
- bonding wire
- semiconductor
- semiconductor chip
- bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
Landscapes
- Wire Bonding (AREA)
Description
第１図Ａは本考案の実施例の平面図、Ｂはその
Ａ―Ａ′線断面図、第２図及び第３図は本考案の
他の実施例を夫々示す平面図、第４図Ａは従来の
半導体回路装置の平面図、ＢはそのＡ―Ａ′線断
面図、第５図は従来例の他の装置の平面図である
。
主要部分の符号の説明、４，５……引出し電極
、６……チツプ、９……ボンデイングランド用導
体パターン、１０……ボンデイングワイヤ、１１
……絶縁基板。
FIG. 1A is a plan view of an embodiment of the present invention, B is a sectional view taken along the line A-A', FIGS. 2 and 3 are plan views showing other embodiments of the present invention, and FIG. 4A is a plan view of an embodiment of the present invention. 1 is a plan view of a conventional semiconductor circuit device, B is a cross-sectional view taken along the line AA', and FIG. 5 is a plan view of another conventional device. Explanation of symbols of main parts, 4, 5... Leading electrode, 6... Chip, 9... Conductor pattern for bonding ground, 10... Bonding wire, 11
...Insulating substrate.
Claims (1)
極と、前記半導体チツプと前記引出し電極との間
を中継接続するためのボンデイングワイヤとを含
む半導体回路装置であつて、前記ボンデイングワ
イヤのためのボンデイングランド用導体パターン
が前記引出し電極設置用基板と同一基板上に形成
されていることを特徴とする半導体回路装置。 A semiconductor circuit device comprising a semiconductor chip, an extraction electrode of a semiconductor package, and a bonding wire for relay connection between the semiconductor chip and the extraction electrode, the conductor pattern for a bonding ground for the bonding wire. is formed on the same substrate as the extraction electrode installation substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985127619U JPH0416437Y2 (en) | 1985-08-21 | 1985-08-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985127619U JPH0416437Y2 (en) | 1985-08-21 | 1985-08-21 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6236535U true JPS6236535U (en) | 1987-03-04 |
| JPH0416437Y2 JPH0416437Y2 (en) | 1992-04-13 |
Family
ID=31022543
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985127619U Expired JPH0416437Y2 (en) | 1985-08-21 | 1985-08-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0416437Y2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58122763A (en) * | 1982-01-14 | 1983-07-21 | Toshiba Corp | Resin sealed type semiconductor device |
-
1985
- 1985-08-21 JP JP1985127619U patent/JPH0416437Y2/ja not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58122763A (en) * | 1982-01-14 | 1983-07-21 | Toshiba Corp | Resin sealed type semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0416437Y2 (en) | 1992-04-13 |