ATE229231T1 - Verfahren zur herstellung einer halbleiteranordnung mit einer leitfähigen schicht - Google Patents

Verfahren zur herstellung einer halbleiteranordnung mit einer leitfähigen schicht

Info

Publication number
ATE229231T1
ATE229231T1 AT90913222T AT90913222T ATE229231T1 AT E229231 T1 ATE229231 T1 AT E229231T1 AT 90913222 T AT90913222 T AT 90913222T AT 90913222 T AT90913222 T AT 90913222T AT E229231 T1 ATE229231 T1 AT E229231T1
Authority
AT
Austria
Prior art keywords
film
producing
conductive layer
semiconductor arrangement
material layer
Prior art date
Application number
AT90913222T
Other languages
English (en)
Inventor
Tadahiro Ohmi
Mamoru Miyawaki
Original Assignee
Tadahiro Ohmi
Canon Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tadahiro Ohmi, Canon Kk filed Critical Tadahiro Ohmi
Application granted granted Critical
Publication of ATE229231T1 publication Critical patent/ATE229231T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6314—Formation by oxidation, e.g. oxidation of the substrate of a metallic layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H10D10/051—Manufacture or treatment of vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H10D10/051—Manufacture or treatment of vertical BJTs
    • H10D10/054—Forming extrinsic base regions on silicon substrate after insulating device isolation in vertical BJTs having single crystalline emitter, collector or base regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/80—Heterojunction BJTs
    • H10D10/821—Vertical heterojunction BJTs
    • H10D10/861—Vertical heterojunction BJTs having an emitter region comprising one or more non-monocrystalline elements of Group IV, e.g. amorphous silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/80—Heterojunction BJTs
    • H10D10/821—Vertical heterojunction BJTs
    • H10D10/891—Vertical heterojunction BJTs comprising lattice-mismatched active layers, e.g. SiGe strained-layer transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0275—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149—Source or drain regions of field-effect devices
    • H10D62/151—Source or drain regions of field-effect devices of IGFETs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H10D62/221—Channel regions of field-effect devices of FETs
    • H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/025—Manufacture or treatment forming recessed gates, e.g. by using local oxidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251—Source or drain electrodes for field-effect devices
    • H10D64/258—Source or drain electrodes for field-effect devices characterised by the relative positions of the source or drain electrodes with respect to the gate electrode
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/281—Base electrodes for bipolar transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6938—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
    • H10P14/6939—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
    • H10P14/69391—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/662—Laminate layers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H10P14/6923—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/10—Lift-off masking
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/926—Dummy metallization
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/948—Radiation resist
    • Y10S438/951—Lift-off

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Bipolar Transistors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
AT90913222T 1989-09-09 1990-09-07 Verfahren zur herstellung einer halbleiteranordnung mit einer leitfähigen schicht ATE229231T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1233929A JP2746289B2 (ja) 1989-09-09 1989-09-09 素子の作製方法並びに半導体素子およびその作製方法
PCT/JP1990/001149 WO1991003841A1 (fr) 1989-09-09 1990-09-07 Element, procede servant a sa fabrication, element semi-conducteur et procede servant a sa fabrication

Publications (1)

Publication Number Publication Date
ATE229231T1 true ATE229231T1 (de) 2002-12-15

Family

ID=16962820

Family Applications (1)

Application Number Title Priority Date Filing Date
AT90913222T ATE229231T1 (de) 1989-09-09 1990-09-07 Verfahren zur herstellung einer halbleiteranordnung mit einer leitfähigen schicht

Country Status (6)

Country Link
US (2) US5541444A (de)
EP (1) EP0463165B1 (de)
JP (1) JP2746289B2 (de)
AT (1) ATE229231T1 (de)
DE (1) DE69034023T2 (de)
WO (1) WO1991003841A1 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3695606B2 (ja) * 1996-04-01 2005-09-14 忠弘 大見 半導体装置及びその製造方法
JPH1125201A (ja) * 1997-07-02 1999-01-29 Tadahiro Omi 半導体集積回路
US6127857A (en) * 1997-07-02 2000-10-03 Canon Kabushiki Kaisha Output buffer or voltage hold for analog of multilevel processing
JPH1125200A (ja) * 1997-07-02 1999-01-29 Tadahiro Omi 半導体集積回路
JPH1127116A (ja) 1997-07-02 1999-01-29 Tadahiro Omi 半導体集積回路、電圧コントロールディレイライン、ディレイロックドループ、自己同期パイプライン式デジタルシステム、電圧制御発振器、およびフェーズロックドループ
US6057171A (en) 1997-09-25 2000-05-02 Frequency Technology, Inc. Methods for determining on-chip interconnect process parameters
US6136678A (en) * 1998-03-02 2000-10-24 Motorola, Inc. Method of processing a conductive layer and forming a semiconductor device
US6087208A (en) * 1998-03-31 2000-07-11 Advanced Micro Devices, Inc. Method for increasing gate capacitance by using both high and low dielectric gate material
US6191011B1 (en) * 1998-09-28 2001-02-20 Ag Associates (Israel) Ltd. Selective hemispherical grain silicon deposition
EP1710842B1 (de) * 1999-03-15 2008-11-12 Matsushita Electric Industrial Co., Ltd. Herstellungsverfahren für einen Bipolar-Transistor und ein MISFET Halbleiter Bauelement
US7456113B2 (en) * 2000-06-26 2008-11-25 Applied Materials, Inc. Cleaning method and solution for cleaning a wafer in a single wafer process
US6927176B2 (en) * 2000-06-26 2005-08-09 Applied Materials, Inc. Cleaning method and solution for cleaning a wafer in a single wafer process
JP2003209186A (ja) * 2002-01-15 2003-07-25 Seiko Epson Corp 半導体装置
DE10231407B4 (de) * 2002-07-11 2007-01-11 Infineon Technologies Ag Bipolartransistor
JP3940063B2 (ja) * 2002-11-20 2007-07-04 松下電器産業株式会社 可変容量素子および可変容量素子内蔵集積回路
US6911681B1 (en) * 2004-04-14 2005-06-28 International Business Machines Corporation Method of base formation in a BiCMOS process
US7259111B2 (en) * 2005-01-19 2007-08-21 Applied Materials, Inc. Interface engineering to improve adhesion between low k stacks
US7445976B2 (en) * 2006-05-26 2008-11-04 Freescale Semiconductor, Inc. Method of forming a semiconductor device having an interlayer and structure therefor
US7375948B2 (en) * 2006-06-12 2008-05-20 Teledyne Licensing, Llc Variable charge packet integrated circuit capacitor
US7655550B2 (en) * 2006-06-30 2010-02-02 Freescale Semiconductor, Inc. Method of making metal gate transistors
US7297376B1 (en) 2006-07-07 2007-11-20 Applied Materials, Inc. Method to reduce gas-phase reactions in a PECVD process with silicon and organic precursors to deposit defect-free initial layers
US7579232B1 (en) * 2008-07-11 2009-08-25 Sandisk 3D Llc Method of making a nonvolatile memory device including forming a pillar shaped semiconductor device and a shadow mask
KR101578931B1 (ko) * 2008-12-05 2015-12-21 주식회사 동부하이텍 반도체 소자 및 반도체 소자의 제조 방법
US9059095B2 (en) 2013-04-22 2015-06-16 International Business Machines Corporation Self-aligned borderless contacts using a photo-patternable dielectric material as a replacement contact

Family Cites Families (46)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3398335A (en) * 1965-03-31 1968-08-20 Ibm Transistor structure with an emitter region epitaxially grown over the base region
US3823349A (en) * 1970-01-22 1974-07-09 Ibm Interconnection metallurgy system for semiconductor devices
JPS4842680A (de) * 1971-09-29 1973-06-21
JPS52147063A (en) * 1976-06-02 1977-12-07 Toshiba Corp Semiconductor electrode forming method
JPS5335475A (en) * 1976-09-14 1978-04-01 Matsushita Electric Ind Co Ltd Production of semiconductor unit
JPS5491059A (en) * 1977-12-28 1979-07-19 Fujitsu Ltd Etching method for phosphorus glass by plasma etching
US4157269A (en) * 1978-06-06 1979-06-05 International Business Machines Corporation Utilizing polysilicon diffusion sources and special masking techniques
JPS5515230A (en) * 1978-07-19 1980-02-02 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and its manufacturing method
EP0007805B1 (de) * 1978-07-29 1983-02-16 Fujitsu Limited Verfahren zur Beschichtung der Seitenwände von Halbleiterbauteilen
JPS55145347A (en) * 1979-04-27 1980-11-12 Mitsubishi Electric Corp Forming method of semiconductor protective film for semiconductor device
JPS588139B2 (ja) * 1979-05-31 1983-02-14 富士通株式会社 半導体装置の製造方法
JPS55163860A (en) * 1979-06-06 1980-12-20 Toshiba Corp Manufacture of semiconductor device
JPS56158482A (en) * 1980-05-12 1981-12-07 Mitsubishi Electric Corp Semiconductor device
IE52791B1 (en) * 1980-11-05 1988-03-02 Fujitsu Ltd Semiconductor devices
US4324038A (en) * 1980-11-24 1982-04-13 Bell Telephone Laboratories, Incorporated Method of fabricating MOS field effect transistors
JPS57207374A (en) * 1981-06-15 1982-12-20 Nec Corp Manufacture of semiconductor device
US4441247A (en) * 1981-06-29 1984-04-10 Intel Corporation Method of making MOS device by forming self-aligned polysilicon and tungsten composite gate
US4483726A (en) * 1981-06-30 1984-11-20 International Business Machines Corporation Double self-aligned fabrication process for making a bipolar transistor structure having a small polysilicon-to-extrinsic base contact area
JPS5825229A (ja) * 1981-08-08 1983-02-15 Matsushita Electronics Corp 半導体装置の製造方法
JPS5946105B2 (ja) * 1981-10-27 1984-11-10 日本電信電話株式会社 バイポ−ラ型トランジスタ装置及びその製法
US4419810A (en) * 1981-12-30 1983-12-13 International Business Machines Corporation Self-aligned field effect transistor process
US4495512A (en) * 1982-06-07 1985-01-22 International Business Machines Corporation Self-aligned bipolar transistor with inverted polycide base contact
JPS5955015A (ja) * 1982-09-22 1984-03-29 Fujitsu Ltd 半導体装置の製造方法
JPS60198863A (ja) * 1984-03-23 1985-10-08 Nec Corp Ｍｉｓトランジスタ及びその製造方法
US4532002A (en) * 1984-04-10 1985-07-30 Rca Corporation Multilayer planarizing structure for lift-off technique
JPS61202427A (ja) * 1985-03-05 1986-09-08 Nec Corp 半導体装置の電極形成方法
JPH0622238B2 (ja) * 1985-10-02 1994-03-23 沖電気工業株式会社 バイポ−ラ型半導体集積回路装置の製造方法
JPS6292327A (ja) * 1985-10-18 1987-04-27 Hitachi Ltd 半導体装置及びその製造方法
JPS6298770A (ja) * 1985-10-25 1987-05-08 Sony Corp 半導体装置の製造方法
US5198372A (en) * 1986-01-30 1993-03-30 Texas Instruments Incorporated Method for making a shallow junction bipolar transistor and transistor formed thereby
JPH063807B2 (ja) * 1986-03-11 1994-01-12 日本電信電話株式会社 半導体装置およびその製造方法
JPH0810696B2 (ja) * 1986-03-12 1996-01-31 富士通株式会社 半導体装置の製造方法
JPS62213140A (ja) * 1986-03-14 1987-09-19 Nec Corp 配線の製造方法
US5077227A (en) * 1986-06-03 1991-12-31 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for fabricating the same
DE3686721D1 (de) * 1986-10-08 1992-10-15 Ibm Verfahren zur herstellung einer kontaktoeffnung mit gewuenschter schraege in einer zusammengesetzten schicht, die mit photoresist maskiert ist.
JPS63177523A (ja) * 1987-01-19 1988-07-21 Matsushita Electric Ind Co Ltd コンタクトホ−ル形成方法
US4789885A (en) * 1987-02-10 1988-12-06 Texas Instruments Incorporated Self-aligned silicide in a polysilicon self-aligned bipolar transistor
JPS63253664A (ja) * 1987-04-10 1988-10-20 Sony Corp バイポ−ラトランジスタ
JPS63257268A (ja) * 1987-04-14 1988-10-25 Nec Corp 半導体集積回路
DE3825701A1 (de) * 1987-07-29 1989-02-09 Toshiba Kawasaki Kk Verfahren zur herstellung eines bipolaren transistors
JPH01140761A (ja) * 1987-11-27 1989-06-01 Nec Corp 半導体装置
JPH01222477A (ja) * 1988-03-01 1989-09-05 Fujitsu Ltd 配線接続電極とその製造方法
US5096842A (en) * 1988-05-16 1992-03-17 Kabushiki Kaisha Toshiba Method of fabricating bipolar transistor using self-aligned polysilicon technology
US4882294A (en) * 1988-08-17 1989-11-21 Delco Electronics Corporation Process for forming an epitaxial layer having portions of different thicknesses
KR910005401B1 (ko) * 1988-09-07 1991-07-29 경상현 비결정 실리콘을 이용한 자기정렬 트랜지스터 제조방법
JP3207883B2 (ja) * 1990-09-18 2001-09-10 松下電器産業株式会社 バイポーラ半導体装置の製造方法

Also Published As

Publication number Publication date
EP0463165A4 (en) 1992-03-11
US5854097A (en) 1998-12-29
EP0463165B1 (de) 2002-12-04
EP0463165A1 (de) 1992-01-02
WO1991003841A1 (fr) 1991-03-21
JPH0397231A (ja) 1991-04-23
US5541444A (en) 1996-07-30
JP2746289B2 (ja) 1998-05-06
DE69034023D1 (de) 2003-01-16
DE69034023T2 (de) 2003-04-30

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