IT1250233B - Procedimento per la fabbricazione di circuiti integrati in tecnologia mos. - Google Patents

Procedimento per la fabbricazione di circuiti integrati in tecnologia mos.

Info

Publication number
IT1250233B
IT1250233B ITTO910929A ITTO910929A IT1250233B IT 1250233 B IT1250233 B IT 1250233B IT TO910929 A ITTO910929 A IT TO910929A IT TO910929 A ITTO910929 A IT TO910929A IT 1250233 B IT1250233 B IT 1250233B
Authority
IT
Italy
Prior art keywords
substrate
manufacture
integrated circuits
isolation zones
conductivity
Prior art date
Application number
ITTO910929A
Other languages
English (en)
Inventor
Manlio Sergio Cereda
Giancarlo Ginami
Enrico Laurin
Andrea Ravaglia
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to ITTO910929A priority Critical patent/IT1250233B/it
Publication of ITTO910929A0 publication Critical patent/ITTO910929A0/it
Priority to DE69231484T priority patent/DE69231484T2/de
Priority to EP92118785A priority patent/EP0545082B1/en
Priority to JP4320695A priority patent/JPH05251555A/ja
Publication of ITTO910929A1 publication Critical patent/ITTO910929A1/it
Application granted granted Critical
Publication of IT1250233B publication Critical patent/IT1250233B/it
Priority to US08/475,555 priority patent/US5696399A/en
Priority to US08/524,080 priority patent/US5663080A/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/49—Simultaneous manufacture of periphery and memory cells comprising different types of peripheral transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0188—Manufacturing their isolation regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0125—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics
    • H10W10/0126—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics introducing electrical active impurities in local oxidation regions to create channel stoppers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0125—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics
    • H10W10/0126—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics introducing electrical active impurities in local oxidation regions to create channel stoppers
    • H10W10/0127—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics introducing electrical active impurities in local oxidation regions to create channel stoppers using both n-type and p-type impurities, e.g. for isolation of complementary doped regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

Procedimento per la fabbricazione di circuiti integrati comprendente in sequenza le fasi di: crescita selettiva di zone di isolamento di campo (10) di materiale isolante estendentisi parzialmente entro un substrato (1) di un predeterminato tipo di conducibilità (P); deposito di uno strato di silicio policristallino (14) sul substrato, sagomatura dello strato di silicio policristallino tramite una maschera di sagomatura (20), e impianto (21) selettivo di specie ioniche dello stesso tipo di conducibilità (P) del substrato (1) utilizzando la maschera di sagomatura (20) e attraverso le zone di isolamento di campo (10) estendentisi nel substrato (1) del predeterminato tipo di conducibilità (P) per realizzare zone di isolamento arricchite (channel stopper 8') al di sotto di tali zone di isolamento di campo.Figura 10
ITTO910929A 1991-11-29 1991-11-29 Procedimento per la fabbricazione di circuiti integrati in tecnologia mos. IT1250233B (it)

Priority Applications (6)

Application Number Priority Date Filing Date Title
ITTO910929A IT1250233B (it) 1991-11-29 1991-11-29 Procedimento per la fabbricazione di circuiti integrati in tecnologia mos.
DE69231484T DE69231484T2 (de) 1991-11-29 1992-11-02 Verfahren zur Herstellung von Isolationszonen des LOCOS-Typs für integrierte Schaltungen vom MOS-Typ
EP92118785A EP0545082B1 (en) 1991-11-29 1992-11-02 Process for manufacturing MOS-type integrated circuits comprising LOCOS isolation regions
JP4320695A JPH05251555A (ja) 1991-11-29 1992-11-30 Ｍｏｓ型集積回路の製造方法
US08/475,555 US5696399A (en) 1991-11-29 1995-06-07 Process for manufacturing MOS-type integrated circuits
US08/524,080 US5663080A (en) 1991-11-29 1995-09-06 Process for manufacturing MOS-type integrated circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITTO910929A IT1250233B (it) 1991-11-29 1991-11-29 Procedimento per la fabbricazione di circuiti integrati in tecnologia mos.

Publications (3)

Publication Number Publication Date
ITTO910929A0 ITTO910929A0 (it) 1991-11-29
ITTO910929A1 ITTO910929A1 (it) 1993-05-29
IT1250233B true IT1250233B (it) 1995-04-03

Family

ID=11409750

Family Applications (1)

Application Number Title Priority Date Filing Date
ITTO910929A IT1250233B (it) 1991-11-29 1991-11-29 Procedimento per la fabbricazione di circuiti integrati in tecnologia mos.

Country Status (5)

Country Link
US (2) US5696399A (it)
EP (1) EP0545082B1 (it)
JP (1) JPH05251555A (it)
DE (1) DE69231484T2 (it)
IT (1) IT1250233B (it)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0788168A1 (en) 1996-01-31 1997-08-06 STMicroelectronics S.r.l. Process of fabricating non-volatile floating-gate memory devices, and memory device fabricated thereby
JPH104182A (ja) * 1996-06-14 1998-01-06 Oki Electric Ind Co Ltd 半導体装置およびその製造方法
US5888871A (en) * 1996-12-24 1999-03-30 Samsung Electronics Co., Ltd. Methods of forming EEPROM memory cells having uniformly thick tunnelling oxide layers
US6144064A (en) * 1996-12-24 2000-11-07 Samsung Electronics Co., Ltd. Split-gate EEPROM device having floating gate with double polysilicon layer
US5943579A (en) * 1997-02-14 1999-08-24 Micron Technology, Inc. Method for forming a diffusion region in a semiconductor device
US6624495B2 (en) * 1997-04-23 2003-09-23 Altera Corporation Adjustable threshold isolation transistor
US6020222A (en) * 1997-12-16 2000-02-01 Advanced Micro Devices, Inc. Silicon oxide insulator (SOI) semiconductor having selectively linked body
FR2778018B1 (fr) * 1998-04-28 2000-06-23 Sgs Thomson Microelectronics Procede de fabrication de dispositifs eeprom
US6380016B2 (en) * 1998-06-23 2002-04-30 Ross Alan Kohler Method for forming programmable CMOS ROM devices
US6362049B1 (en) * 1998-12-04 2002-03-26 Advanced Micro Devices, Inc. High yield performance semiconductor process flow for NAND flash memory products
JP2001168306A (ja) * 1999-12-09 2001-06-22 Toshiba Corp 不揮発性半導体記憶装置及びその製造方法
JP2003031797A (ja) * 2001-07-12 2003-01-31 Mitsubishi Electric Corp 半導体装置およびその製造方法
KR100935248B1 (ko) * 2003-02-05 2010-01-06 매그나칩 반도체 유한회사 Ｄｍｏｓ 트랜지스터 및 그 제조 방법
JP4346322B2 (ja) * 2003-02-07 2009-10-21 株式会社ルネサステクノロジ 半導体装置
US7238563B2 (en) * 2003-03-10 2007-07-03 Kabushiki Kaisha Toshiba Semiconductor device having isolation region and method of manufacturing the same
JP4540320B2 (ja) * 2003-09-19 2010-09-08 Ｏｋｉセミコンダクタ株式会社 半導体装置の製造方法
US20060108641A1 (en) * 2004-11-19 2006-05-25 Taiwan Semiconductor Manufacturing Company, Ltd. Device having a laterally graded well structure and a method for its manufacture

Family Cites Families (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3319311A (en) * 1963-05-24 1967-05-16 Ibm Semiconductor devices and their fabrication
NL136562C (it) * 1963-10-24
US3461360A (en) * 1965-06-30 1969-08-12 Ibm Semiconductor devices with cup-shaped regions
GB1316555A (it) * 1969-08-12 1973-05-09
US3764396A (en) * 1969-09-18 1973-10-09 Kogyo Gijutsuin Transistors and production thereof
NL7017066A (it) * 1970-11-21 1972-05-24
US3821776A (en) * 1970-12-28 1974-06-28 Kogyo Gijutsuin Diffusion self aligned mosfet with pinch off isolation
US3845495A (en) * 1971-09-23 1974-10-29 Signetics Corp High voltage, high frequency double diffused metal oxide semiconductor device
NL161305C (nl) * 1971-11-20 1980-01-15 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderin- richting.
US3924265A (en) * 1973-08-29 1975-12-02 American Micro Syst Low capacitance V groove MOS NOR gate and method of manufacture
US4001860A (en) * 1973-11-12 1977-01-04 Signetics Corporation Double diffused metal oxide semiconductor structure with isolated source and drain and method
US3909320A (en) * 1973-12-26 1975-09-30 Signetics Corp Method for forming MOS structure using double diffusion
US3986903A (en) * 1974-03-13 1976-10-19 Intel Corporation Mosfet transistor and method of fabrication
JPS5148981A (ja) * 1974-10-25 1976-04-27 Nippon Electric Co Zetsuengeetogatadenkaikokahandotaisochi
US4015278A (en) * 1974-11-26 1977-03-29 Fujitsu Ltd. Field effect semiconductor device
JPS5185381A (it) * 1975-01-24 1976-07-26 Hitachi Ltd
JPS52132684A (en) * 1976-04-29 1977-11-07 Sony Corp Insulating gate type field effect transistor
JPS5366181A (en) * 1976-11-26 1978-06-13 Hitachi Ltd High dielectric strength mis type transistor
US4055884A (en) * 1976-12-13 1977-11-01 International Business Machines Corporation Fabrication of power field effect transistors and the resulting structures
JPS5374385A (en) * 1976-12-15 1978-07-01 Hitachi Ltd Manufacture of field effect semiconductor device
DE2703877C2 (de) * 1977-01-31 1982-06-03 Siemens Ag, 1000 Berlin Und 8000 Muenchen MIS-Transistor von kurzer Kanallänge und Verfahren zu seiner Herstellung
US4145703A (en) * 1977-04-15 1979-03-20 Supertex, Inc. High power MOS device and fabrication method therefor
JPS53135284A (en) * 1977-04-30 1978-11-25 Nec Corp Production of field effect transistor
JPS54885A (en) * 1977-06-03 1979-01-06 Nec Corp Manufacture of field effect transistor
US4148047A (en) * 1978-01-16 1979-04-03 Honeywell Inc. Semiconductor apparatus
JPS5553462A (en) * 1978-10-13 1980-04-18 Int Rectifier Corp Mosfet element
DK157272C (da) * 1978-10-13 1990-04-30 Int Rectifier Corp Mosfet med hoej effekt
US4246593A (en) * 1979-01-02 1981-01-20 Texas Instruments Incorporated High density static memory cell with polysilicon resistors
US4344081A (en) * 1980-04-14 1982-08-10 Supertex, Inc. Combined DMOS and a vertical bipolar transistor device and fabrication method therefor
US4680853A (en) * 1980-08-18 1987-07-21 International Rectifier Corporation Process for manufacture of high power MOSFET with laterally distributed high carrier density beneath the gate oxide
US4593302B1 (en) * 1980-08-18 1998-02-03 Int Rectifier Corp Process for manufacture of high power mosfet laterally distributed high carrier density beneath the gate oxide
CA1155969A (en) * 1980-09-26 1983-10-25 Clement A.T. Salama Field effect transistor device and method of production thereof
US4412242A (en) * 1980-11-17 1983-10-25 International Rectifier Corporation Planar structure for high voltage semiconductor devices with gaps in glassy layer over high field regions
US4399449A (en) * 1980-11-17 1983-08-16 International Rectifier Corporation Composite metal and polysilicon field plate structure for high voltage semiconductor devices
JPS5893347A (ja) * 1981-11-30 1983-06-03 Toshiba Corp Ｍｏｓ型半導体装置及びその製造方法
JPS59178746A (ja) * 1983-03-30 1984-10-11 Toshiba Corp 半導体装置の製造方法
US4918501A (en) * 1984-05-23 1990-04-17 Hitachi, Ltd. Semiconductor device and method of producing the same
US4663645A (en) * 1984-05-23 1987-05-05 Hitachi, Ltd. Semiconductor device of an LDD structure having a floating gate
US5194924A (en) * 1984-05-23 1993-03-16 Hitachi, Ltd. Semiconductor device of an LDD structure having a floating gate
IT1213249B (it) * 1984-11-26 1989-12-14 Ates Componenti Elettron Processo per la fabbricazione distrutture integrate includenti celle di memoria non volatili con strati di silicio autoallineati ed associati transistori.
FR2583920B1 (fr) * 1985-06-21 1987-07-31 Commissariat Energie Atomique Procede de fabrication d'un circuit integre et notamment d'une memoire eprom comportant deux composants distincts isoles electriquement
US4798810A (en) * 1986-03-10 1989-01-17 Siliconix Incorporated Method for manufacturing a power MOS transistor
US4786614A (en) * 1987-02-26 1988-11-22 Siliconix Incorporated Method of fabricating a high voltage semiconductor device having a pair of V-shaped isolation grooves
JPS6420866A (en) * 1987-07-15 1989-01-24 Kuraray Co Artificial leather ball
JPH01194436A (ja) * 1988-01-29 1989-08-04 Nec Yamaguchi Ltd 半導体装置
JP2644275B2 (ja) * 1988-05-11 1997-08-25 富士通株式会社 半導体装置の製造方法
JP3013992B2 (ja) * 1989-02-01 2000-02-28 住友電気工業株式会社 化合物半導体結晶の成長方法
US4931408A (en) * 1989-10-13 1990-06-05 Siliconix Incorporated Method of fabricating a short-channel low voltage DMOS transistor
US5151381A (en) * 1989-11-15 1992-09-29 Advanced Micro Devices, Inc. Method for local oxidation of silicon employing two oxidation steps
US5153143A (en) * 1990-02-26 1992-10-06 Delco Electronics Corporation Method of manufacturing CMOS integrated circuit with EEPROM
JPH0831539B2 (ja) * 1990-05-17 1996-03-27 富士通株式会社 不揮発性メモリの製造方法
US5192707A (en) * 1991-07-31 1993-03-09 Sgs-Thomson Microelectronics, Inc. Method of forming isolated regions of oxide

Also Published As

Publication number Publication date
US5663080A (en) 1997-09-02
ITTO910929A0 (it) 1991-11-29
JPH05251555A (ja) 1993-09-28
DE69231484D1 (de) 2000-11-02
EP0545082B1 (en) 2000-09-27
DE69231484T2 (de) 2001-02-08
EP0545082A3 (en) 1994-10-12
ITTO910929A1 (it) 1993-05-29
US5696399A (en) 1997-12-09
EP0545082A2 (en) 1993-06-09

Similar Documents

Publication Publication Date Title
IT1250233B (it) Procedimento per la fabbricazione di circuiti integrati in tecnologia mos.
JPS53112069A (en) Production of mis transistor
JPS57113263A (en) Semiconductor device and its manufacture
JPS5214388A (en) Process for complementary insulated gate semiconductor integrated circuit device
JPS6433970A (en) Field effect semiconductor device
JPS5265686A (en) Production of mos semiconductor device
JPS5245273A (en) Method for production of semiconductor device
JPS5272580A (en) Production of semiconductor device
JPS53125781A (en) Manufacture for semiconductor device
JPS53100779A (en) Production of insulated gate type semiconductor device
JPS51123074A (en) Production process of fet
JPS57160171A (en) Manufacture of semiconductor device
JPS57132368A (en) Semiconductor device
JPS5242080A (en) Micro channel type insulated gate field effect transistor and process for productin thereof
JPS5279785A (en) Production of semiconductor device
JPS5533037A (en) Manufacture of semiconductor device
JPS5698876A (en) Junction type fet
JPS5344181A (en) Production of semiconductor device
JPS51135381A (en) Semiconductor device and its manufacturing method
JPS5737882A (en) Compound semiconductor device and production thereof
JPS6446974A (en) Manufacture of semiconductor device
JPS5414179A (en) Constituent of electrostatic induction transistor logic
JPS5342571A (en) Production of semiconductor device
JPS6427271A (en) Manufacture of thin-film transistor
JPS5370680A (en) Production of junction type field effect transistor

Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19971129