JPH036867U - - Google Patents

Info

Publication number
JPH036867U
JPH036867U JP1990067478U JP6747890U JPH036867U JP H036867 U JPH036867 U JP H036867U JP 1990067478 U JP1990067478 U JP 1990067478U JP 6747890 U JP6747890 U JP 6747890U JP H036867 U JPH036867 U JP H036867U
Authority
JP
Japan
Prior art keywords
chip component
insulating layer
conductor pattern
integrated circuit
hybrid integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1990067478U
Other languages
English (en)
Other versions
JPH0631738Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990067478U priority Critical patent/JPH0631738Y2/ja
Publication of JPH036867U publication Critical patent/JPH036867U/ja
Application granted granted Critical
Publication of JPH0631738Y2 publication Critical patent/JPH0631738Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【図面の簡単な説明】
第1図は本考案の実施例の断面説明図、第2図
は従来の実施例の断面説明図である。 1……セラミツク基板、2……第1層回路導体
パターン層、2′……第2層回路導体パターン層
、2″……最上層回路導体パターン層、3……第
1層絶縁層、3′……第2層絶縁層、3″……最
上層絶縁層、4……チツプ接合層、5……チツプ
部品、6……空隙、7……チツプ挿入用嵌合領域
。

Claims (1)

    【実用新案登録請求の範囲】
  1. セラミツク基板上に樹脂厚膜材料により回路導
    体パターンと絶縁層を複数段積み重ね、該複数団
    積み重ねた層中に内蔵したチツプ部品を有する混
    成集積回路において、該チツプ部品を前記絶縁層
    に設けた嵌合領域に載置し、該嵌合領域を設けた
    前記絶縁層上に形成した回路導体パターンに前記
    チツプ部品の上面側を樹脂導電性材料により接合
    するようにしたことを特徴とする高密度実装混成
    集積回路。
JP1990067478U 1990-06-26 1990-06-26 高密度実装混成集積回路 Expired - Lifetime JPH0631738Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990067478U JPH0631738Y2 (ja) 1990-06-26 1990-06-26 高密度実装混成集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990067478U JPH0631738Y2 (ja) 1990-06-26 1990-06-26 高密度実装混成集積回路

Publications (2)

Publication Number Publication Date
JPH036867U true JPH036867U (ja) 1991-01-23
JPH0631738Y2 JPH0631738Y2 (ja) 1994-08-22

Family

ID=31601087

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990067478U Expired - Lifetime JPH0631738Y2 (ja) 1990-06-26 1990-06-26 高密度実装混成集積回路

Country Status (1)

Country Link
JP (1) JPH0631738Y2 (ja)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5788959U (ja) * 1980-11-20 1982-06-01
JPS58105168U (ja) * 1982-01-13 1983-07-18 日立電子株式会社 多層配線板の部品取付構造
JPS60208859A (ja) * 1984-04-02 1985-10-21 Toshiba Corp 混成機能回路
JPS61222793A (ja) * 1985-03-28 1986-10-03 三菱電機株式会社 Icカ−ドの製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5788959U (ja) * 1980-11-20 1982-06-01
JPS58105168U (ja) * 1982-01-13 1983-07-18 日立電子株式会社 多層配線板の部品取付構造
JPS60208859A (ja) * 1984-04-02 1985-10-21 Toshiba Corp 混成機能回路
JPS61222793A (ja) * 1985-03-28 1986-10-03 三菱電機株式会社 Icカ−ドの製造方法

Also Published As

Publication number Publication date
JPH0631738Y2 (ja) 1994-08-22

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