JPH0442730U - - Google Patents

Info

Publication number
JPH0442730U
JPH0442730U JP1990083515U JP8351590U JPH0442730U JP H0442730 U JPH0442730 U JP H0442730U JP 1990083515 U JP1990083515 U JP 1990083515U JP 8351590 U JP8351590 U JP 8351590U JP H0442730 U JPH0442730 U JP H0442730U
Authority
JP
Japan
Prior art keywords
power semiconductor
die
bonded
semiconductor element
heat spreader
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1990083515U
Other languages
English (en)
Other versions
JP2505195Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990083515U priority Critical patent/JP2505195Y2/ja
Publication of JPH0442730U publication Critical patent/JPH0442730U/ja
Application granted granted Critical
Publication of JP2505195Y2 publication Critical patent/JP2505195Y2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Die Bonding (AREA)

Description

【図面の簡単な説明】
第1図は本考案実施例の構成を示す平面図、第
2図および第3図は本考案実施例に用いられるヒ
ートスプレツダの構造を示す図でおのおのaは平
面図、bは正面図を示し、第4図aは従来用いら
れたヒートスプレツダの構造を示す平面図、bは
その正面図である。 1……打ち抜き穴、2……電力半導体素子、3
……ヒートスプレツダ、4……溝、5……金属ベ
ース基板、6……端子、7……ワイヤーボンデイ
ング、8……ボンデイングパターン、9……導体
パターン。

Claims (1)

    【実用新案登録請求の範囲】
  1. 電力半導体素子がダイボンドされたヒートスプ
    レツダが、金属ベース基板にハンダ付けされ、樹
    脂により封止されてなる電力半導体装置において
    、上記電力半導体素子がダイボンドされている部
    分を除く上記ヒートスプレツダ上に貫通穴を設け
    たことを特徴とする電力半導体装置。
JP1990083515U 1990-08-06 1990-08-06 電力半導体装置 Expired - Fee Related JP2505195Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990083515U JP2505195Y2 (ja) 1990-08-06 1990-08-06 電力半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990083515U JP2505195Y2 (ja) 1990-08-06 1990-08-06 電力半導体装置

Publications (2)

Publication Number Publication Date
JPH0442730U true JPH0442730U (ja) 1992-04-10
JP2505195Y2 JP2505195Y2 (ja) 1996-07-24

Family

ID=31631246

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990083515U Expired - Fee Related JP2505195Y2 (ja) 1990-08-06 1990-08-06 電力半導体装置

Country Status (1)

Country Link
JP (1) JP2505195Y2 (ja)

Also Published As

Publication number Publication date
JP2505195Y2 (ja) 1996-07-24

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees