JPH0514427B2 - - Google Patents
Info
- Publication number
- JPH0514427B2 JPH0514427B2 JP2013875A JP1387590A JPH0514427B2 JP H0514427 B2 JPH0514427 B2 JP H0514427B2 JP 2013875 A JP2013875 A JP 2013875A JP 1387590 A JP1387590 A JP 1387590A JP H0514427 B2 JPH0514427 B2 JP H0514427B2
- Authority
- JP
- Japan
- Prior art keywords
- leads
- chip
- stacked
- hole
- lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10507—Involving several components
- H05K2201/10515—Stacked components
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013875A JPH02290048A (ja) | 1989-02-15 | 1990-01-24 | 積層型半導体の実装方法 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3682289 | 1989-02-15 | ||
| JP1-36822 | 1989-02-15 | ||
| JP2013875A JPH02290048A (ja) | 1989-02-15 | 1990-01-24 | 積層型半導体の実装方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02290048A JPH02290048A (ja) | 1990-11-29 |
| JPH0514427B2 true JPH0514427B2 (de) | 1993-02-25 |
Family
ID=26349731
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013875A Granted JPH02290048A (ja) | 1989-02-15 | 1990-01-24 | 積層型半導体の実装方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02290048A (de) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2855719B2 (ja) * | 1989-03-20 | 1999-02-10 | セイコーエプソン株式会社 | 半導体装置 |
| JP2504969Y2 (ja) * | 1991-09-30 | 1996-07-24 | 船井電機株式会社 | 半導体の実装構造 |
| JP3980807B2 (ja) | 2000-03-27 | 2007-09-26 | 株式会社東芝 | 半導体装置及び半導体モジュール |
| JP4309368B2 (ja) | 2005-03-30 | 2009-08-05 | エルピーダメモリ株式会社 | 半導体記憶装置 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2631665B2 (ja) * | 1987-09-24 | 1997-07-16 | 日立マクセル株式会社 | 積層半導体装置の製造方法 |
| JPH01184860A (ja) * | 1988-01-13 | 1989-07-24 | Hitachi Maxell Ltd | 半導体装置の製造方法 |
-
1990
- 1990-01-24 JP JP2013875A patent/JPH02290048A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH02290048A (ja) | 1990-11-29 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |