JPS58115835A - 半導体装置の埋込配線形成方法 - Google Patents

半導体装置の埋込配線形成方法

Info

Publication number
JPS58115835A
JPS58115835A JP56211202A JP21120281A JPS58115835A JP S58115835 A JPS58115835 A JP S58115835A JP 56211202 A JP56211202 A JP 56211202A JP 21120281 A JP21120281 A JP 21120281A JP S58115835 A JPS58115835 A JP S58115835A
Authority
JP
Japan
Prior art keywords
wiring
parts
hole
semiconductor device
buried
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56211202A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0440858B2 (2
Inventor
Hajime Kamioka
上岡　元
Motoo Nakano
元雄 中野
Mikio Takagi
幹夫 高木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56211202A priority Critical patent/JPS58115835A/ja
Publication of JPS58115835A publication Critical patent/JPS58115835A/ja
Publication of JPH0440858B2 publication Critical patent/JPH0440858B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP56211202A 1981-12-28 1981-12-28 半導体装置の埋込配線形成方法 Granted JPS58115835A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56211202A JPS58115835A (ja) 1981-12-28 1981-12-28 半導体装置の埋込配線形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56211202A JPS58115835A (ja) 1981-12-28 1981-12-28 半導体装置の埋込配線形成方法

Publications (2)

Publication Number Publication Date
JPS58115835A true JPS58115835A (ja) 1983-07-09
JPH0440858B2 JPH0440858B2 (2) 1992-07-06

Family

ID=16602046

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56211202A Granted JPS58115835A (ja) 1981-12-28 1981-12-28 半導体装置の埋込配線形成方法

Country Status (1)

Country Link
JP (1) JPS58115835A (2)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6269534A (ja) * 1985-09-20 1987-03-30 Nippon Telegr & Teleph Corp <Ntt> 平坦性薄膜の形成方法
JPH0235732A (ja) * 1988-07-26 1990-02-06 Matsushita Electric Ind Co Ltd 金属薄膜の形成方法及び形成装置
US5110759A (en) * 1988-12-20 1992-05-05 Fujitsu Limited Conductive plug forming method using laser planarization

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50150365A (2) * 1974-05-22 1975-12-02
JPS54121082A (en) * 1978-03-13 1979-09-19 Nec Corp Manufacture of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50150365A (2) * 1974-05-22 1975-12-02
JPS54121082A (en) * 1978-03-13 1979-09-19 Nec Corp Manufacture of semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6269534A (ja) * 1985-09-20 1987-03-30 Nippon Telegr & Teleph Corp <Ntt> 平坦性薄膜の形成方法
JPH0235732A (ja) * 1988-07-26 1990-02-06 Matsushita Electric Ind Co Ltd 金属薄膜の形成方法及び形成装置
US5110759A (en) * 1988-12-20 1992-05-05 Fujitsu Limited Conductive plug forming method using laser planarization

Also Published As

Publication number Publication date
JPH0440858B2 (2) 1992-07-06

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