SK41393A3 - System and method for dynamically linked code segments in real time - Google Patents

System and method for dynamically linked code segments in real time Download PDF

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Publication number
SK41393A3
SK41393A3 SK41393A SK41393A SK41393A3 SK 41393 A3 SK41393 A3 SK 41393A3 SK 41393 A SK41393 A SK 41393A SK 41393 A SK41393 A SK 41393A SK 41393 A3 SK41393 A3 SK 41393A3
Authority
SK
Slovakia
Prior art keywords
code
processor
buffer
pointer
dsp
Prior art date
Application number
SK41393A
Other languages
English (en)
Slovak (sk)
Inventor
Ronald J Lisle
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of SK41393A3 publication Critical patent/SK41393A3/sk

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/16—Multiplexed systems, i.e. using two or more similar devices which are alternately accessed for enqueue and dequeue operations, e.g. ping-pong buffers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G06F9/44521—Dynamic linking or loading; Link editing at or after load time, e.g. Java class loading
    • G—PHYSICS
    • G10—MUSICAL INSTRUMENTS; ACOUSTICS
    • G10H—ELECTROPHONIC MUSICAL INSTRUMENTS; INSTRUMENTS IN WHICH THE TONES ARE GENERATED BY ELECTROMECHANICAL MEANS OR ELECTRONIC GENERATORS, OR IN WHICH THE TONES ARE SYNTHESISED FROM A DATA STORE
    • G10H7/00—Instruments in which the tones are synthesised from a data store, e.g. computer organs
    • G10H7/002—Instruments in which the tones are synthesised from a data store, e.g. computer organs using a common processing for different operations or calculations, and a set of microinstructions, e.g. programs, to control the sequence thereof
    • G10H7/004—Instruments in which the tones are synthesised from a data store, e.g. computer organs using a common processing for different operations or calculations, and a set of microinstructions, e.g. programs, to control the sequence thereof with one or more auxiliary processor in addition to the main processing unit

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Multimedia (AREA)
  • Electrophonic Musical Instruments (AREA)
  • Multi Processors (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Complex Calculations (AREA)
SK41393A 1990-11-01 1991-10-29 System and method for dynamically linked code segments in real time SK41393A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US60812690A 1990-11-01 1990-11-01
PCT/EP1991/002036 WO1992008192A1 (en) 1990-11-01 1991-10-29 System and method for dynamically linking code segments in real time

Publications (1)

Publication Number Publication Date
SK41393A3 true SK41393A3 (en) 1993-07-07

Family

ID=24435152

Family Applications (1)

Application Number Title Priority Date Filing Date
SK41393A SK41393A3 (en) 1990-11-01 1991-10-29 System and method for dynamically linked code segments in real time

Country Status (10)

Country Link
US (1) US5539896A (ja)
EP (1) EP0483970A1 (ja)
JP (1) JP3203701B2 (ja)
CZ (1) CZ9300787A3 (ja)
HU (1) HU215862B (ja)
IL (1) IL99744A (ja)
PL (1) PL166975B1 (ja)
SK (1) SK41393A3 (ja)
WO (1) WO1992008192A1 (ja)
ZA (1) ZA918427B (ja)

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US5696990A (en) * 1995-05-15 1997-12-09 Nvidia Corporation Method and apparatus for providing improved flow control for input/output operations in a computer system having a FIFO circuit and an overflow storage area
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US6078945A (en) * 1995-06-21 2000-06-20 Tao Group Limited Operating system for use with computer networks incorporating two or more data processors linked together for parallel processing and incorporating improved dynamic load-sharing techniques
US5799314A (en) * 1995-06-30 1998-08-25 Sun Microsystems, Inc. System and method of controlling mapping of data buffers for heterogenous programs in digital computer system
US5909702A (en) * 1995-09-29 1999-06-01 Intel Corporation Memory address translations for programs code execution/relocation
JP3087638B2 (ja) * 1995-11-30 2000-09-11 ヤマハ株式会社 音楽情報処理システム
US5819067A (en) * 1996-02-23 1998-10-06 Advanced Micro Devices, Inc. Computer system configured to translate a computer program into a second computer program prior to executing the computer program
US6031916A (en) * 1996-02-28 2000-02-29 Kabushiki Kaisha Kawai Gakki Seisakusho Sound effect adding device using DSP
US5763801A (en) * 1996-03-25 1998-06-09 Advanced Micro Devices, Inc. Computer system and method for performing wavetable music synthesis which stores wavetable data in system memory
US5809342A (en) * 1996-03-25 1998-09-15 Advanced Micro Devices, Inc. Computer system and method for generating delay-based audio effects in a wavetable music synthesizer which stores wavetable data in system memory
US5890013A (en) * 1996-09-30 1999-03-30 Intel Corporation Paged memory architecture for a single chip multi-processor with physical memory pages that are swapped without latency
JP3747584B2 (ja) * 1996-10-18 2006-02-22 ヤマハ株式会社 端末装置の機能拡張方法及びホストコンピュータ並びに端末装置
US6453409B1 (en) * 1996-11-07 2002-09-17 Yamaha Corporation Digital signal processing system
WO2000000887A1 (en) * 1998-06-30 2000-01-06 Intergraph Corporation Method and apparatus for transporting information to a graphic accelerator card
US6308253B1 (en) * 1999-03-31 2001-10-23 Sony Corporation RISC CPU instructions particularly suited for decoding digital signal processing applications
FR2809508B1 (fr) * 2000-05-23 2002-08-30 Thomson Csf Systeme et methode de gestion d'une architecture multi-ressources
AU756842B2 (en) 2000-08-29 2003-01-23 Hoya Corporation Optical element having antireflection film
JP2002207708A (ja) * 2001-01-12 2002-07-26 Mitsubishi Electric Corp 演算装置
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US7174548B2 (en) * 2001-10-15 2007-02-06 Intel Corporation Managing firmware download
US7546451B1 (en) * 2002-06-19 2009-06-09 Finisar Corporation Continuously providing instructions to a programmable device
US6996699B2 (en) * 2002-09-10 2006-02-07 Microsoft Corporation Secondary processor execution kernel framework
JP2006505845A (ja) * 2002-11-05 2006-02-16 コーニンクレッカ　フィリップス　エレクトロニクス　エヌ　ヴィ 周期的アドレスパターンに応答してアドレスをリダイレクトするデータ処理装置
JP4542308B2 (ja) * 2002-12-16 2010-09-15 株式会社ソニー・コンピュータエンタテインメント 信号処理用デバイス及び情報処理機器
JP4837247B2 (ja) * 2003-09-24 2011-12-14 パナソニック株式会社 プロセッサ
US7487498B2 (en) * 2003-11-12 2009-02-03 Microsoft Corporation Strategy for referencing code resources
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US8489783B2 (en) * 2007-01-03 2013-07-16 Apple Inc. Multi buffer asynchronous scheme for processing incoming information
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US8041848B2 (en) * 2008-08-04 2011-10-18 Apple Inc. Media processing method and device
US9250858B2 (en) * 2013-02-20 2016-02-02 International Business Machines Corporation Dual-buffer serialization and consumption of variable-length data records produced by multiple parallel threads
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Also Published As

Publication number Publication date
PL166975B1 (pl) 1995-07-31
EP0483970A1 (en) 1992-05-06
HU215862B (hu) 1999-03-29
IL99744A (en) 1995-05-26
HU9301263D0 (en) 1993-08-30
CZ9300787A3 (cs) 2002-07-17
WO1992008192A1 (en) 1992-05-14
ZA918427B (en) 1992-08-26
US5539896A (en) 1996-07-23
JPH04289955A (ja) 1992-10-14
JP3203701B2 (ja) 2001-08-27
HUT65534A (en) 1994-06-28

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