ATE461525T1 - Prozess zum kapseln von komponenten und gekapselte komponenten - Google Patents

Prozess zum kapseln von komponenten und gekapselte komponenten

Info

Publication number
ATE461525T1
ATE461525T1 AT04797893T AT04797893T ATE461525T1 AT E461525 T1 ATE461525 T1 AT E461525T1 AT 04797893 T AT04797893 T AT 04797893T AT 04797893 T AT04797893 T AT 04797893T AT E461525 T1 ATE461525 T1 AT E461525T1
Authority
AT
Austria
Prior art keywords
regions
base substrate
wafer level
functional
components
Prior art date
Application number
AT04797893T
Other languages
English (en)
Inventor
Juergen Leib
Original Assignee
Schott Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Schott Ag filed Critical Schott Ag
Application granted granted Critical
Publication of ATE461525T1 publication Critical patent/ATE461525T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00—Cutting or separating of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W95/00—Packaging processes not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H10W72/07337—Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/352—Materials of die-attach connectors comprising metals or metalloids, e.g. solders
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/934—Cross-sectional shape, i.e. in side view

Landscapes

  • Micromachines (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Dicing (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Packaging Frangible Articles (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Laminated Bodies (AREA)
  • Acyclic And Carbocyclic Compounds In Medicinal Compositions (AREA)
  • Lubricants (AREA)
  • Fats And Perfumes (AREA)
AT04797893T 2003-12-03 2004-11-15 Prozess zum kapseln von komponenten und gekapselte komponenten ATE461525T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10356885A DE10356885B4 (de) 2003-12-03 2003-12-03 Verfahren zum Gehäusen von Bauelementen und gehäustes Bauelement
PCT/EP2004/012917 WO2005055310A2 (en) 2003-12-03 2004-11-15 Process for packaging components, and packaged components

Publications (1)

Publication Number Publication Date
ATE461525T1 true ATE461525T1 (de) 2010-04-15

Family

ID=34638391

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04797893T ATE461525T1 (de) 2003-12-03 2004-11-15 Prozess zum kapseln von komponenten und gekapselte komponenten

Country Status (10)

Country Link
US (2) US7700397B2 (de)
EP (1) EP1700337B1 (de)
JP (2) JP5329758B2 (de)
KR (1) KR20060126636A (de)
CN (1) CN1890789A (de)
AT (1) ATE461525T1 (de)
DE (2) DE10356885B4 (de)
IL (1) IL175341A (de)
TW (1) TW200524066A (de)
WO (1) WO2005055310A2 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10356885B4 (de) 2003-12-03 2005-11-03 Schott Ag Verfahren zum Gehäusen von Bauelementen und gehäustes Bauelement
US7371676B2 (en) * 2005-04-08 2008-05-13 Micron Technology, Inc. Method for fabricating semiconductor components with through wire interconnects
US7393770B2 (en) 2005-05-19 2008-07-01 Micron Technology, Inc. Backside method for fabricating semiconductor components with conductive interconnects
US7307348B2 (en) * 2005-12-07 2007-12-11 Micron Technology, Inc. Semiconductor components having through wire interconnects (TWI)
US7659612B2 (en) 2006-04-24 2010-02-09 Micron Technology, Inc. Semiconductor components having encapsulated through wire interconnects (TWI)
US7531443B2 (en) * 2006-12-08 2009-05-12 Micron Technology, Inc. Method and system for fabricating semiconductor components with through interconnects and back side redistribution conductors
US8178965B2 (en) * 2007-03-14 2012-05-15 Infineon Technologies Ag Semiconductor module having deflecting conductive layer over a spacer structure
DE102007030284B4 (de) * 2007-06-29 2009-12-31 Schott Ag Verfahren zum Verpacken von Halbleiter-Bauelementen und verfahrensgemäß hergestelltes Zwischenprodukt
US8580596B2 (en) * 2009-04-10 2013-11-12 Nxp, B.V. Front end micro cavity
US20100320595A1 (en) * 2009-06-22 2010-12-23 Honeywell International Inc. Hybrid hermetic interface chip
DE102011018295B4 (de) * 2011-04-20 2021-06-24 Austriamicrosystems Ag Verfahren zum Schneiden eines Trägers für elektrische Bauelemente
KR101131782B1 (ko) 2011-07-19 2012-03-30 디지털옵틱스 코포레이션 이스트 집적 모듈용 기판
US9768223B2 (en) * 2011-12-21 2017-09-19 Xintec Inc. Electronics device package and fabrication method thereof
TWI607534B (zh) * 2013-04-19 2017-12-01 精材科技股份有限公司 晶片封裝體及其製造方法
US9070747B2 (en) * 2013-06-27 2015-06-30 Flipchip International Llc Electroplating using dielectric bridges
MA36343B1 (fr) * 2013-10-14 2016-04-29 Nemotek Technologies Procédé de métallisation en cuivre destiné à la fabrication d'un circuit intégré en utilisant la technologie wafer level packaging 3d
KR20160090972A (ko) * 2015-01-22 2016-08-02 에스케이하이닉스 주식회사 이미지 센서 패키지 및 제조 방법
DE102015203393A1 (de) * 2015-02-25 2016-08-25 Infineon Technologies Ag Halbleiterelement und Verfahren zu Herstellen von diesem
US10818625B1 (en) * 2019-06-19 2020-10-27 Nanya Technology Corporation Electronic device
TWI863679B (zh) * 2023-11-06 2024-11-21 矽品精密工業股份有限公司 基板結構、具有該基板結構之電子封裝件與製法

Family Cites Families (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01217993A (ja) * 1988-02-26 1989-08-31 Hitachi Ltd 半導体装置
US5354695A (en) * 1992-04-08 1994-10-11 Leedy Glenn J Membrane dielectric isolation IC fabrication
US5946553A (en) * 1991-06-04 1999-08-31 Micron Technology, Inc. Process for manufacturing a semiconductor package with bi-substrate die
EP0547807A3 (en) * 1991-12-16 1993-09-22 General Electric Company Packaged electronic system
JP2948018B2 (ja) * 1992-03-17 1999-09-13 三菱電機株式会社 半導体装置およびその製造方法
JPH06295962A (ja) * 1992-10-20 1994-10-21 Ibiden Co Ltd 電子部品搭載用基板およびその製造方法並びに電子部品搭載装置
JPH06244437A (ja) * 1993-02-17 1994-09-02 Oki Electric Ind Co Ltd 半導体ウエハ
US5635762A (en) 1993-05-18 1997-06-03 U.S. Philips Corporation Flip chip semiconductor device with dual purpose metallized ground conductor
JP4319251B2 (ja) 1994-11-22 2009-08-26 エヌエックスピー ビー ヴィ 半導体素子を有し導体トラックが形成されている基板が接着層により結合されている支持本体を有する半導体装置
JP3487524B2 (ja) * 1994-12-20 2004-01-19 株式会社ルネサステクノロジ 半導体装置及びその製造方法
DE19620940A1 (de) * 1995-11-17 1997-05-22 Werner Prof Dr Buff Elektronisches Bauelement und Verfahren zu seiner Herstellung
US6171888B1 (en) * 1996-03-08 2001-01-09 Lsi Logic Corp. Multi-layer tab tape having distinct signal, power and ground planes, semiconductor device assembly employing same, apparatus for and method of assembling same
JP3170199B2 (ja) * 1996-03-15 2001-05-28 株式会社東芝 半導体装置及びその製造方法及び基板フレーム
JP2891665B2 (ja) * 1996-03-22 1999-05-17 株式会社日立製作所 半導体集積回路装置およびその製造方法
US5904496A (en) 1997-01-24 1999-05-18 Chipscale, Inc. Wafer fabrication of inside-wrapped contacts for electronic devices
US6051489A (en) * 1997-05-13 2000-04-18 Chipscale, Inc. Electronic component package with posts on the active side of the substrate
JP3641122B2 (ja) * 1997-12-26 2005-04-20 ローム株式会社 半導体発光素子、半導体発光モジュール、およびこれらの製造方法
IL123207A0 (en) * 1998-02-06 1998-09-24 Shellcase Ltd Integrated circuit device
US6114221A (en) * 1998-03-16 2000-09-05 International Business Machines Corporation Method and apparatus for interconnecting multiple circuit chips
JPH11297972A (ja) * 1998-04-10 1999-10-29 Fujitsu Ltd 半導体装置の製造方法
JP3129288B2 (ja) * 1998-05-28 2001-01-29 日本電気株式会社 マイクロ波集積回路マルチチップモジュール、マイクロ波集積回路マルチチップモジュールの実装構造
US6075712A (en) * 1999-01-08 2000-06-13 Intel Corporation Flip-chip having electrical contact pads on the backside of the chip
EP1148546A1 (de) * 2000-04-19 2001-10-24 Infineon Technologies AG Verfahren zur Justierung von Strukturen auf einem Halbleiter-substrat
DE10104868A1 (de) * 2001-02-03 2002-08-22 Bosch Gmbh Robert Mikromechanisches Bauelement sowie ein Verfahren zur Herstellung eines mikromechanischen Bauelements
US6717254B2 (en) * 2001-02-22 2004-04-06 Tru-Si Technologies, Inc. Devices having substrates with opening passing through the substrates and conductors in the openings, and methods of manufacture
IL160189A0 (en) 2001-08-24 2004-07-25 Zeiss Stiftung Method for producing contacts and printed circuit packages
AU2002333693A1 (en) * 2001-08-24 2003-04-01 Schott Glas Method for producing micro-electromechanical components
DE10141571B8 (de) * 2001-08-24 2005-05-25 Schott Ag Verfahren zum Zusammenbau eines Halbleiterbauelements und damit hergestellte integrierte Schaltungsanordnung, die für dreidimensionale, mehrschichtige Schaltungen geeignet ist
US6559530B2 (en) * 2001-09-19 2003-05-06 Raytheon Company Method of integrating MEMS device with low-resistivity silicon substrates
TW560018B (en) * 2001-10-30 2003-11-01 Asia Pacific Microsystems Inc A wafer level packaged structure and method for manufacturing the same
US7098072B2 (en) * 2002-03-01 2006-08-29 Agng, Llc Fluxless assembly of chip size semiconductor packages
US6806557B2 (en) * 2002-09-30 2004-10-19 Motorola, Inc. Hermetically sealed microdevices having a single crystalline silicon getter for maintaining vacuum
TWI227050B (en) * 2002-10-11 2005-01-21 Sanyo Electric Co Semiconductor device and method for manufacturing the same
TWI241700B (en) * 2003-01-22 2005-10-11 Siliconware Precision Industries Co Ltd Packaging assembly with integrated circuits redistribution routing semiconductor die and method for fabrication
JP2004349593A (ja) 2003-05-26 2004-12-09 Sanyo Electric Co Ltd 半導体装置及びその製造方法
US6777263B1 (en) * 2003-08-21 2004-08-17 Agilent Technologies, Inc. Film deposition to enhance sealing yield of microcap wafer-level package with vias
DE10356885B4 (de) 2003-12-03 2005-11-03 Schott Ag Verfahren zum Gehäusen von Bauelementen und gehäustes Bauelement

Also Published As

Publication number Publication date
JP2007513507A (ja) 2007-05-24
DE10356885A1 (de) 2005-07-07
IL175341A (en) 2010-06-30
US20100187669A1 (en) 2010-07-29
US8309384B2 (en) 2012-11-13
CN1890789A (zh) 2007-01-03
JP5329758B2 (ja) 2013-10-30
IL175341A0 (en) 2006-09-05
US20080038868A1 (en) 2008-02-14
KR20060126636A (ko) 2006-12-08
EP1700337A2 (de) 2006-09-13
JP2012156551A (ja) 2012-08-16
WO2005055310A2 (en) 2005-06-16
DE10356885B4 (de) 2005-11-03
EP1700337B1 (de) 2010-03-17
US7700397B2 (en) 2010-04-20
WO2005055310A3 (en) 2005-11-03
TW200524066A (en) 2005-07-16
DE602004026112D1 (de) 2010-04-29

Similar Documents

Publication Publication Date Title
ATE461525T1 (de) Prozess zum kapseln von komponenten und gekapselte komponenten
NL1027962A1 (nl) Multi-chipverpakking, halfgeleiderinrichting daarin gebruikt en vervaardigingswijze daarvoor.
TW502408B (en) Chip with chamfer
TW200608540A (en) Stacked packaging methods and structures
WO2004034433A3 (en) Semiconductor stacked multi-package module having inverted second package
TW200419765A (en) Semiconductor multi-package module having wire bond interconnection between stacked packages
TW200511453A (en) Methods and apparatus for packaging integrated circuit devices
TW200507250A (en) Semiconductor multipackage module including processor and memory package assemblies
SG153627A1 (en) Reduced footprint packaged microelectronic components and methods for manufacturing such microelectronic components
WO2002082540A1 (en) Semiconductor device, method of manufacture thereof, and semiconductor substrate
TW344887B (en) An improved integrated chip package with reduced dimensions
TWI256719B (en) Semiconductor device package module and manufacturing method thereof
SG90205A1 (en) Process for producing semiconductor device
TW200620607A (en) Flip chip and wire bond semiconductor package
EP0860877A3 (de) Halbleiteranordnung und Herstellungsverfahren dafür
TW200515557A (en) Semiconductor package, method for manufacturing the same and lead frame for use in the same
TW200503236A (en) Semiconductor package and production method
TW200512846A (en) Method for generating chip stacks
TW200511531A (en) Package stack module
SG148973A1 (en) Semiconductor device package having pseudo chips
TW200611384A (en) Three dimensional package and packaging method for integrated circuits
TW200509304A (en) Method of making a package structure by dicing a wafer from the backside surface thereof
TW200719468A (en) Package, package module and manufacturing method of the package
SG107567A1 (en) Method and apparatus for forming a flip chip semiconductor package and method for producing a substrate for the flip chip semiconductor package
TW200608526A (en) Memory module and method for manufacturing the same

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties