JPH0180473U - - Google Patents
Info
- Publication number
- JPH0180473U JPH0180473U JP1987176324U JP17632487U JPH0180473U JP H0180473 U JPH0180473 U JP H0180473U JP 1987176324 U JP1987176324 U JP 1987176324U JP 17632487 U JP17632487 U JP 17632487U JP H0180473 U JPH0180473 U JP H0180473U
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- semiconductor element
- semiconductor
- mounting structure
- sealing resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/726—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Credit Cards Or The Like (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第１図〜第３図は本考案の一実施例に係り、第
１図は半導体の実装構造を示す断面図、第２図は
半導体の実装構造を示す平面図、第３図はＯＬＢ
の接続状態を示す断面図である。 １……リードフレーム、２……突起部、３……
半導体素子、４……接続電極、５……封止樹脂、
６……接合材料、７……基板。
１図は半導体の実装構造を示す断面図、第２図は
半導体の実装構造を示す平面図、第３図はＯＬＢ
の接続状態を示す断面図である。 １……リードフレーム、２……突起部、３……
半導体素子、４……接続電極、５……封止樹脂、
６……接合材料、７……基板。
Claims (1)
- 半導体素子の接続電極部に対応して突起部を形
成したリードフレームと前記半導体素子とを直接
接続し、封止樹脂にて樹脂封止して成る半導体の
実装構造に於て、前記リードフレームの半導体素
子搭載面と反対側の前記リードフレーム面のほぼ
全面を露出せしめ、さらに前記リードフレームを
封止樹脂外形端部と整合する如く配した構成とす
ることを特徴とする半導体の実装構造。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987176324U JPH088138Y2 (ja) | 1987-11-20 | 1987-11-20 | 半導体の実装構造 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987176324U JPH088138Y2 (ja) | 1987-11-20 | 1987-11-20 | 半導体の実装構造 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0180473U true JPH0180473U (ja) | 1989-05-30 |
| JPH088138Y2 JPH088138Y2 (ja) | 1996-03-06 |
Family
ID=31468065
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987176324U Expired - Lifetime JPH088138Y2 (ja) | 1987-11-20 | 1987-11-20 | 半導体の実装構造 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH088138Y2 (ja) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS596839U (ja) * | 1982-07-07 | 1984-01-17 | 日本電気株式会社 | 半導体装置 |
| JPS6232548U (ja) * | 1985-08-14 | 1987-02-26 | ||
| JPS62182560U (ja) * | 1986-05-12 | 1987-11-19 |
-
1987
- 1987-11-20 JP JP1987176324U patent/JPH088138Y2/ja not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS596839U (ja) * | 1982-07-07 | 1984-01-17 | 日本電気株式会社 | 半導体装置 |
| JPS6232548U (ja) * | 1985-08-14 | 1987-02-26 | ||
| JPS62182560U (ja) * | 1986-05-12 | 1987-11-19 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH088138Y2 (ja) | 1996-03-06 |