JPH03116034U - - Google Patents
Info
- Publication number
- JPH03116034U JPH03116034U JP1990025766U JP2576690U JPH03116034U JP H03116034 U JPH03116034 U JP H03116034U JP 1990025766 U JP1990025766 U JP 1990025766U JP 2576690 U JP2576690 U JP 2576690U JP H03116034 U JPH03116034 U JP H03116034U
- Authority
- JP
- Japan
- Prior art keywords
- chips
- circuit board
- bonded onto
- presser plate
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07351—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
- H10W72/07352—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in structures or sizes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/321—Structures or relative sizes of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/877—Bump connectors and die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Wire Bonding (AREA)
Description
第1図aは、この考案の一実施例に係る半導体
装置の実装構造を側方より見た図、第1図bは、
同半導体装置の実装構造を上方より見た図、第2
図a及び第2図bは、それぞれ順に同半導体装置
の実装構造の実装工程を説明する図、第3図は、
同半導体装置の実装構造の変形例を示す図、第4
図aは、先願に係る半導体装置の実装構造を側方
より見た図、第4図bは、同半導体装置の実装構
造を上方より見た図である。 1……チツプ、1a……パツド、2……バンプ
、3……基材、4……押さえ板、5……シリコン
ゴム、6,7……接着剤、A……配線パターン、
B……回路基板。
装置の実装構造を側方より見た図、第1図bは、
同半導体装置の実装構造を上方より見た図、第2
図a及び第2図bは、それぞれ順に同半導体装置
の実装構造の実装工程を説明する図、第3図は、
同半導体装置の実装構造の変形例を示す図、第4
図aは、先願に係る半導体装置の実装構造を側方
より見た図、第4図bは、同半導体装置の実装構
造を上方より見た図である。 1……チツプ、1a……パツド、2……バンプ
、3……基材、4……押さえ板、5……シリコン
ゴム、6,7……接着剤、A……配線パターン、
B……回路基板。
Claims (1)
- 回路基板上に複数個並べて搭載されるチツプと
、これら各チツプのパツド上に形成され、前記回
路基板上の配線パターンに圧接されるバンプと、
前記回路基板上に接着され、前記チツプの配列方
向に沿つて延伸する1対の基材と、前記チツプの
それぞれに備えられ、両端部が前記基材上に接着
される押さえ板と、この押さえ板に設けられ、前
記各チツプの背面を押圧して、前記バンプと配線
パターンとの圧接状態を保持する弾性体とからな
る半導体装置の実装構造。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990025766U JPH083006Y2 (ja) | 1990-03-14 | 1990-03-14 | 半導体装置の実装構造 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990025766U JPH083006Y2 (ja) | 1990-03-14 | 1990-03-14 | 半導体装置の実装構造 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03116034U true JPH03116034U (ja) | 1991-12-02 |
| JPH083006Y2 JPH083006Y2 (ja) | 1996-01-29 |
Family
ID=31528689
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990025766U Expired - Fee Related JPH083006Y2 (ja) | 1990-03-14 | 1990-03-14 | 半導体装置の実装構造 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH083006Y2 (ja) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008029802A (ja) * | 2006-06-29 | 2008-02-14 | Sadao Kiyomiya | 遊技媒体数量表示システム、並びに遊技媒体数量測定装置及び同方法 |
-
1990
- 1990-03-14 JP JP1990025766U patent/JPH083006Y2/ja not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008029802A (ja) * | 2006-06-29 | 2008-02-14 | Sadao Kiyomiya | 遊技媒体数量表示システム、並びに遊技媒体数量測定装置及び同方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH083006Y2 (ja) | 1996-01-29 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |