JPH03266437A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPH03266437A
JPH03266437A JP2065669A JP6566990A JPH03266437A JP H03266437 A JPH03266437 A JP H03266437A JP 2065669 A JP2065669 A JP 2065669A JP 6566990 A JP6566990 A JP 6566990A JP H03266437 A JPH03266437 A JP H03266437A
Authority
JP
Japan
Prior art keywords
contact hole
resist film
film
insulating film
slope
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2065669A
Other languages
English (en)
Japanese (ja)
Inventor
Takao Adachi
足立 隆夫
Keiichi Abe
安部 啓一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2065669A priority Critical patent/JPH03266437A/ja
Priority to KR1019910004026A priority patent/KR950000090B1/ko
Priority to EP91104008A priority patent/EP0446939A2/en
Publication of JPH03266437A publication Critical patent/JPH03266437A/ja
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70466Multiple exposures, e.g. combination of fine and coarse exposures, double patterning or multiple exposures for printing a single feature
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/61Formation of materials, e.g. in the shape of layers or pillars of insulating materials using masks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/73Etching of wafers, substrates or parts of devices using masks for insulating materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/082Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being tapered via holes

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
JP2065669A 1990-03-16 1990-03-16 半導体装置の製造方法 Pending JPH03266437A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2065669A JPH03266437A (ja) 1990-03-16 1990-03-16 半導体装置の製造方法
KR1019910004026A KR950000090B1 (ko) 1990-03-16 1991-03-14 반도체장치의 제조방법
EP91104008A EP0446939A2 (en) 1990-03-16 1991-03-15 Method of manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2065669A JPH03266437A (ja) 1990-03-16 1990-03-16 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
JPH03266437A true JPH03266437A (ja) 1991-11-27

Family

ID=13293639

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2065669A Pending JPH03266437A (ja) 1990-03-16 1990-03-16 半導体装置の製造方法

Country Status (3)

Country Link
EP (1) EP0446939A2 (2)
JP (1) JPH03266437A (2)
KR (1) KR950000090B1 (2)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007514201A (ja) * 2003-12-12 2007-05-31 ヒューレット−パッカード デベロップメント カンパニー エル.ピー. フォトレジスト層の表面にくぼみを形成する方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63258022A (ja) * 1987-04-15 1988-10-25 Rohm Co Ltd 半導体装置の製造方法
JPH0237707A (ja) * 1988-07-27 1990-02-07 Nec Corp 半導体装置の製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56114319A (en) * 1980-02-14 1981-09-08 Fujitsu Ltd Method for forming contact hole
US4714686A (en) * 1985-07-31 1987-12-22 Advanced Micro Devices, Inc. Method of forming contact plugs for planarized integrated circuits
US4727045A (en) * 1986-07-30 1988-02-23 Advanced Micro Devices, Inc. Plugged poly silicon resistor load for static random access memory cells
JPH01120847A (ja) * 1987-11-05 1989-05-12 Fujitsu Ltd 半導体装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63258022A (ja) * 1987-04-15 1988-10-25 Rohm Co Ltd 半導体装置の製造方法
JPH0237707A (ja) * 1988-07-27 1990-02-07 Nec Corp 半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007514201A (ja) * 2003-12-12 2007-05-31 ヒューレット−パッカード デベロップメント カンパニー エル.ピー. フォトレジスト層の表面にくぼみを形成する方法

Also Published As

Publication number Publication date
KR950000090B1 (ko) 1995-01-09
EP0446939A3 (2) 1994-03-30
EP0446939A2 (en) 1991-09-18

Similar Documents

Publication Publication Date Title
JPH05326358A (ja) 微細パターン形成方法
JPH03266437A (ja) 半導体装置の製造方法
JPS62102531A (ja) エツチング方法
US4581316A (en) Method of forming resist patterns in negative photoresist layer using false pattern
EP0104235A4 (en) METHOD OF FORMING A HYBRID LITHOGRAPHIC PROTECTION MATERIAL WITH ELECTRONIC / OPTICAL RADIUS.
KR100431991B1 (ko) 레티클 및 이를 이용한 반도체소자의 제조방법
KR100515372B1 (ko) 반도체 소자의 미세 패턴 형성 방법
JPH04291345A (ja) パターン形成方法
KR100257770B1 (ko) 반도체 소자의 미세한 전도막 패턴 형성 방법
KR100396689B1 (ko) 반도체소자의게이트제조방법
JPH09213609A (ja) 半導体装置の製造方法
KR100239435B1 (ko) 반도체 소자의 제조 방법
KR20040013190A (ko) 반도체 장치의 패턴형성방법
KR100212011B1 (ko) 패턴 형성용 마스크 및 이를 이용한 노광방법
JPH03127827A (ja) 半導体装置の製造法
KR19990019502A (ko) 반도체 소자의 제조 방법
JPH05165195A (ja) ガラスマスク並びに該ガラスマスクを使用した半導体装置の製造方法
JPS62137831A (ja) 半導体装置の製造方法
JPH01302841A (ja) 半導体装置の配線形成方法
JPH04324618A (ja) レジストパターン形成方法
JPS6328338B2 (2)
JPH01273313A (ja) パターニング方法
JPH04291721A (ja) 薄膜回路の製造方法
JPS6154629A (ja) フオト・レジストパタ−ンの形成方法
JPS62243341A (ja) 半導体装置の製造方法