JPS58220434A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS58220434A
JPS58220434A JP57104267A JP10426782A JPS58220434A JP S58220434 A JPS58220434 A JP S58220434A JP 57104267 A JP57104267 A JP 57104267A JP 10426782 A JP10426782 A JP 10426782A JP S58220434 A JPS58220434 A JP S58220434A
Authority
JP
Japan
Prior art keywords
bonding
die
wire
layer
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57104267A
Other languages
English (en)
Inventor
Minoru Hirai
平井　稔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP57104267A priority Critical patent/JPS58220434A/ja
Publication of JPS58220434A publication Critical patent/JPS58220434A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/013—Manufacture or treatment of die-attach connectors
    • H10W72/01308—Manufacture or treatment of die-attach connectors using permanent auxiliary members, e.g. using alignment marks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07311—Treating the bonding area before connecting, e.g. by applying flux or cleaning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07351—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
    • H10W72/07352—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in structures or sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/321—Structures or relative sizes of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H10W72/5473—Dispositions of multiple bond wires multiple bond wires connected to a common bond pad
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 本発明は半導体装置に関し、半導体収納容器にダイボッ
ド時におけるダイボンド材が濡れにくく、かつ、ワイヤ
ーボンドの可能な領域を設け、ダイアタッチ部へのワイ
ヤーボンドを容易にするものである。
従来の半田ダイボンドについて第１図、第２図（ＩＬ）
、　（ｂ）に従って説明する。
第１図のごとく半導体収納容器のダイアタッチ部１に半
田２を敷き、その上に半導体素子３を置き加熱すること
で第２図（＆）、　（ｂ）の様に半田を溶解させて半導
体素子を接着する。ダイアタッチ部１には金属のメッキ
層４がある。
ダイボンド後、外部電極群５と半導体素子上の電極群６
とを金属線７で接続するが、一部の半導体素子では電極
群６の中の特定の電極とダイアタッチ部１とを接続する
ことがある。この時に、溶解して流れた半田がダイアタ
ッチ部１の全面に広がっていたのではダイアタッチ部に
超音波法、熱圧着法、超音波熱圧着法等によるワイヤー
ボンドはできない。仮に半田がダイアタッチ部１全面に
広がっていなかったとしても、半田が流れていない部分
は全くランダムであり、この部分へワイヤーボンドする
ことは容易ではない。
そこで本発明は上記欠点を除去するために、ダイアタッ
チ部１に半田が流れに＜＜、かつ、超音波法、熱圧着法
、超音波熱圧着法等によるワイヤーボンドが可能な領域
を設けることで、ダイアタッチ部へのワイヤーボンドを
容易にするものである。
第３図（＆）、　（ｂ）は本発明の一実施例にかかる半
導体装置を示すものである。第２図と同一部分には同一
番号を付している。ダイアタッチ部１の中で、かつ、半
導体素子が実際に接着される部分の外側の部分に、半田
が濡れず、かつ、超音波法、熱圧着法、超音波熱圧着法
等によるワイヤーボンドが可能な金属例えばムｌで蒸着
層又はメッキ層８を設ける。この層により溶解した半田
の流動は防げ、さらにダイアタッチ部１の蒸着層または
メッキ層８に金属細線９によるワイヤーボンドが可能に
なる。
以上のように、本発明では半導体収納容器のダイアタッ
チ部にダイポンド材が濡れにくり、かつ、ワイヤーボン
ドが可能り、領域を有するだめダイボンド材の不必要な
濡れを防げダイアタッチ部へのワイヤーボンドを容易に
行うことができる。
【図面の簡単な説明】
第１図は半田ダイポンドされた半導体素子の要部概略断
面図、第２図（ａ）、Φ）は従来の中空型半導体収納容
器の正面図、概略要部断面図、第３図（ａ）。 Φ）は本発明の一実施例にかかる半導体収納容器の正面
図！概略要部断面図である。 １・・・・・・ダイアタッチ部、３・・・・・・半導体
素子、４・・・・・・金属のメッキ層、６・・・・・・
外部電極群、８・・・・・・蒸着まだはメッキ層、９・
・・・・・金属細線。

Claims (1)

    【特許請求の範囲】
  1. （１）半導体収納容器の半導体素子を接着する部分に、
    半導体素子をダイボンドする時にダイボンド材が濡れに
    ＜＜、かつワイヤーボンドが可能な領域を有する半導体
    装置。 し）領域が、半田が流れに＜＜、かつワイヤーボンドが
    可能な金属の蒸着層又はメッキ層よりなることを特徴と
    する特許請求範囲第１項に記載の半導体装置。
JP57104267A 1982-06-16 1982-06-16 半導体装置 Pending JPS58220434A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57104267A JPS58220434A (ja) 1982-06-16 1982-06-16 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57104267A JPS58220434A (ja) 1982-06-16 1982-06-16 半導体装置

Publications (1)

Publication Number Publication Date
JPS58220434A true JPS58220434A (ja) 1983-12-22

Family

ID=14376148

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57104267A Pending JPS58220434A (ja) 1982-06-16 1982-06-16 半導体装置

Country Status (1)

Country Link
JP (1) JPS58220434A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4903114A (en) * 1985-10-01 1990-02-20 Fujitsu Limited Resin-molded semiconductor
US6251469B1 (en) 1997-03-19 2001-06-26 International Business Machines, Corporation Method of rendering a substrate selectively non-wettable chip carrier with enhanced wire bondability

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4903114A (en) * 1985-10-01 1990-02-20 Fujitsu Limited Resin-molded semiconductor
US6251469B1 (en) 1997-03-19 2001-06-26 International Business Machines, Corporation Method of rendering a substrate selectively non-wettable chip carrier with enhanced wire bondability
US6534186B2 (en) 1997-03-19 2003-03-18 International Business Machines Corporation Chip carriers with enhanced wire bondability

Similar Documents

Publication Publication Date Title
US5186381A (en) Semiconductor chip bonding process
JPS61125062A (ja) ピン取付け方法およびピン取付け装置
JPS58169942A (ja) 半導体装置
JPS58220434A (ja) 半導体装置
JPH0228351A (ja) 半導体装置
JPH025534A (ja) ペースト塗布用ノズル及びペースト塗布方法
JPH01309336A (ja) 半導体容器
JPS5728336A (en) Forming method for electrode of semiconductor device
JPH03274755A (ja) 樹脂封止半導体装置とその製造方法
JPS62122157A (ja) 光半導体用ヒ−トシンクの電極構造
JPH05160316A (ja) 半導体素子
JPS63181455A (ja) Ｉｃパツケ−ジの封止方法
JPH02238641A (ja) 半導体装置の製造方法
JPH04155949A (ja) 樹脂封止型半導体装置
JPS607139A (ja) ボンデイング方法
JPH0446448B2 (ja)
JPH01209733A (ja) 半導体装置
JP3945017B2 (ja) 半導体装置の製造方法
JPH0310670Y2 (ja)
JPH03187227A (ja) 半導体装置
JPH0366130A (ja) バンプ形成方法
JPH04239160A (ja) 樹脂封止型電子部品の製造方法
JP2532821B2 (ja) 半導体装置
JPH04184942A (ja) 半導体装置用パッケージ
JPS6155778B2 (ja)