JPH0456342U - - Google Patents
Info
- Publication number
- JPH0456342U JPH0456342U JP1990099921U JP9992190U JPH0456342U JP H0456342 U JPH0456342 U JP H0456342U JP 1990099921 U JP1990099921 U JP 1990099921U JP 9992190 U JP9992190 U JP 9992190U JP H0456342 U JPH0456342 U JP H0456342U
- Authority
- JP
- Japan
- Prior art keywords
- glass cloth
- center layer
- semiconductor device
- wiring board
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Laminated Bodies (AREA)
Description
第1図は本考案の一実施例の半導体装置の断面
図、第2図は従来の半導体装置の断面図である。 1……半導体素子、2……接着剤、3……アラ
シドエポキシ、4……接着層、5……ガラス布エ
ポキシ基板、6……配線回路、7……ソルダーレ
ジスト、8……ボンデイングワイヤ、9……封入
樹脂、10……外部接続用端子。
図、第2図は従来の半導体装置の断面図である。 1……半導体素子、2……接着剤、3……アラ
シドエポキシ、4……接着層、5……ガラス布エ
ポキシ基板、6……配線回路、7……ソルダーレ
ジスト、8……ボンデイングワイヤ、9……封入
樹脂、10……外部接続用端子。
Claims (1)
- 配線基板に半導体素子を搭載し、上部を樹脂で
覆い前記半導体素子を保護した半導体装置におい
て、前記配線基板の中心層と上下部の主表面層と
が異なる材料で構成されていて、前記中心層がガ
ラス布エポキシ系又はガラス布トリアジン系又は
ガラス布ポリイミド系の積層板からなり、前記表
面層がアラシド繊維にエポキシ樹脂を含浸させて
積層した金属張積層板からなり、前記中心層が全
板厚に対して40%乃至70%を占めていること
を特徴とする半導体装置。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990099921U JP2532486Y2 (ja) | 1990-09-25 | 1990-09-25 | 半導体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990099921U JP2532486Y2 (ja) | 1990-09-25 | 1990-09-25 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0456342U true JPH0456342U (ja) | 1992-05-14 |
| JP2532486Y2 JP2532486Y2 (ja) | 1997-04-16 |
Family
ID=31842191
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990099921U Expired - Lifetime JP2532486Y2 (ja) | 1990-09-25 | 1990-09-25 | 半導体装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2532486Y2 (ja) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0221694A (ja) * | 1988-07-08 | 1990-01-24 | Matsushita Electric Works Ltd | 多層プリント配線板 |
| JPH02150345A (ja) * | 1988-11-30 | 1990-06-08 | Shin Kobe Electric Mach Co Ltd | 銅張積層板 |
-
1990
- 1990-09-25 JP JP1990099921U patent/JP2532486Y2/ja not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0221694A (ja) * | 1988-07-08 | 1990-01-24 | Matsushita Electric Works Ltd | 多層プリント配線板 |
| JPH02150345A (ja) * | 1988-11-30 | 1990-06-08 | Shin Kobe Electric Mach Co Ltd | 銅張積層板 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2532486Y2 (ja) | 1997-04-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0312554Y2 (ja) | ||
| JPH081108Y2 (ja) | Icモジュール | |
| JPS6334316Y2 (ja) | ||
| JPS6413144U (ja) | ||
| JPH0142344Y2 (ja) | ||
| JPH0375539U (ja) | ||
| JPS61239693A (ja) | 多層配線板とその製法 | |
| JPH0456187A (ja) | プリント配線板の製造方法 | |
| JP3579973B2 (ja) | 段付きダム枠及び電子部品搭載用基板 | |
| JPS5812456Y2 (ja) | 混成集積回路装置 | |
| JP2532486Y2 (ja) | 半導体装置 | |
| JPH03101529U (ja) | ||
| JPH02120868U (ja) | ||
| JPH0428152B2 (ja) | ||
| JPS6316455U (ja) | ||
| JPS6390873A (ja) | 金属ベ−ス配線板の製造方法 | |
| JPS6232550U (ja) | ||
| JPS62114772U (ja) | ||
| JPH0365275U (ja) | ||
| JPS6324846U (ja) | ||
| JPH0242440U (ja) | ||
| JPH0476046U (ja) | ||
| JPH0470739U (ja) | ||
| JPH01125554U (ja) | ||
| KR960030382A (ko) | 반도체 소자의 패키지 장치 및 그 제조방법 |