JPS5923751U - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS5923751U
JPS5923751U JP1983084952U JP8495283U JPS5923751U JP S5923751 U JPS5923751 U JP S5923751U JP 1983084952 U JP1983084952 U JP 1983084952U JP 8495283 U JP8495283 U JP 8495283U JP S5923751 U JPS5923751 U JP S5923751U
Authority
JP
Japan
Prior art keywords
semiconductor chip
semiconductor device
tab
semiconductor
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1983084952U
Other languages
English (en)
Inventor
藪下哲男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP1983084952U priority Critical patent/JPS5923751U/ja
Publication of JPS5923751U publication Critical patent/JPS5923751U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07551—Controlling the environment, e.g. atmosphere composition or temperature characterised by changes in properties of the bond wires during the connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/581—Auxiliary members, e.g. flow barriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第１図及び第２図は従来の半導体装置のタブ部断面図を
示し、特に第２図においては、タブとホンディングワイ
ヤがタブショートしている事を表わす。第３図は本考案
の実施例で、タブ部断面図を示す。 １・・・半導体チップ、２・・・タブ、３・・・リード
フレームのリード、４・・・ホンディングワイヤ、５・
・・非導電性コート材。

Claims (2)

    【実用新案登録請求の範囲】
  1. （１）　　リードフレームのタブに半導体チップを固着
    すると共に前記半導体チップと前記リードフレームのリ
    ードとの間をホンディングワイヤで結線し、前記タブ、
    前記半導体チップ、前記ボンディングワイヤ及び前記リ
    ートのチップ側端部を樹脂で被覆封止してなる樹脂封止
    半導体装置において、前記タフの前記半導体チップが固
    着される側の全面及び端面か非導電性コート材で被覆さ
    れている事を特徴とする半導体装置。
  2. （２）半導体チップか非導電性コート材にてタブに固着
    されている事を特徴とする実用新案登録請求の範囲第１
    項記載の半導体装置。
JP1983084952U 1983-06-03 1983-06-03 半導体装置 Pending JPS5923751U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983084952U JPS5923751U (ja) 1983-06-03 1983-06-03 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983084952U JPS5923751U (ja) 1983-06-03 1983-06-03 半導体装置

Publications (1)

Publication Number Publication Date
JPS5923751U true JPS5923751U (ja) 1984-02-14

Family

ID=30214918

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983084952U Pending JPS5923751U (ja) 1983-06-03 1983-06-03 半導体装置

Country Status (1)

Country Link
JP (1) JPS5923751U (ja)

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