JPH03102768U - - Google Patents

Info

Publication number
JPH03102768U
JPH03102768U JP1990011552U JP1155290U JPH03102768U JP H03102768 U JPH03102768 U JP H03102768U JP 1990011552 U JP1990011552 U JP 1990011552U JP 1155290 U JP1155290 U JP 1155290U JP H03102768 U JPH03102768 U JP H03102768U
Authority
JP
Japan
Prior art keywords
wiring board
printed wiring
multilayer printed
pad electrode
resin multilayer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1990011552U
Other languages
English (en)
Other versions
JPH085580Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990011552U priority Critical patent/JPH085580Y2/ja
Publication of JPH03102768U publication Critical patent/JPH03102768U/ja
Application granted granted Critical
Publication of JPH085580Y2 publication Critical patent/JPH085580Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)

Description

【図面の簡単な説明】
第１図は本考案の第１の実施例を示すポリイミ
ド樹脂多層プリント配線板への半導体素子の実装
状態を示す断面図、第２図は従来のポリイミド樹
脂多層プリント配線板上への半導体素子の実装状
態を示す断面図、第３図は本考案の第２の実施例
を示す樹脂多層プリント配線板への半導体素子の
実装状態を示す断面図、第４図は本考案の第３の
実施例を示す樹脂多層プリント配線板への半導体
素子の実装状態を示す断面図である。 １……セラミツク基板、２……感光性ポリイミ
ド樹脂、３……導体配線、４……バイヤホール、
５……半導体素子、６……接着剤、７……半導体
素子のパツド電極、８……表層導体配線のパツド
電極、９……ボンデイング用ワイヤ、１０……封
止用樹脂、１１……表層導体配線、１２，４０，
５０……高硬度の柱（金属柱）。

Claims (1)

  1. 【実用新案登録請求の範囲】 半導体素子のパツド電極と多層プリント配線板
    のパツド電極間をワイヤボンデイングにより接続
    する樹脂多層プリント配線板において、 前記樹脂多層プリント配線板のパツド電極の下
    層に接続時の外圧によつて該パツド電極が埋没し
    ないように高硬度の柱を形成したことを特徴とす
    る樹脂多層プリント配線板。
JP1990011552U 1990-02-09 1990-02-09 樹脂多層プリント配線板 Expired - Lifetime JPH085580Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990011552U JPH085580Y2 (ja) 1990-02-09 1990-02-09 樹脂多層プリント配線板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990011552U JPH085580Y2 (ja) 1990-02-09 1990-02-09 樹脂多層プリント配線板

Publications (2)

Publication Number Publication Date
JPH03102768U true JPH03102768U (ja) 1991-10-25
JPH085580Y2 JPH085580Y2 (ja) 1996-02-14

Family

ID=31515075

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990011552U Expired - Lifetime JPH085580Y2 (ja) 1990-02-09 1990-02-09 樹脂多層プリント配線板

Country Status (1)

Country Link
JP (1) JPH085580Y2 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006120999A (ja) * 2004-10-25 2006-05-11 Kyocera Corp 多層配線基板

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57175385U (ja) * 1981-04-28 1982-11-05
JPS58219798A (ja) * 1982-06-14 1983-12-21 日本電気株式会社 多層配線基板
JPS60140897A (ja) * 1983-12-28 1985-07-25 日本電気株式会社 樹脂絶縁多層基板
JPS616834A (ja) * 1984-06-21 1986-01-13 Fujitsu Ltd 半導体装置の製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57175385U (ja) * 1981-04-28 1982-11-05
JPS58219798A (ja) * 1982-06-14 1983-12-21 日本電気株式会社 多層配線基板
JPS60140897A (ja) * 1983-12-28 1985-07-25 日本電気株式会社 樹脂絶縁多層基板
JPS616834A (ja) * 1984-06-21 1986-01-13 Fujitsu Ltd 半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006120999A (ja) * 2004-10-25 2006-05-11 Kyocera Corp 多層配線基板

Also Published As

Publication number Publication date
JPH085580Y2 (ja) 1996-02-14

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term